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[63.158.47.182]) by smtp.gmail.com with ESMTPSA id gc1sm165783pjb.20.2020.02.06.12.45.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 06 Feb 2020 12:45:50 -0800 (PST) Received: (nullmailer pid 7333 invoked by uid 1000); Thu, 06 Feb 2020 17:28:31 -0000 Date: Thu, 6 Feb 2020 17:28:31 +0000 From: Rob Herring To: Sandeep Maheswaram Cc: Andy Gross , Bjorn Andersson , Kishon Vijay Abraham I , Mark Rutland , Stephen Boyd , Doug Anderson , Matthias Kaehlcke , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH v4 1/8] dt-bindings: phy: qcom,qusb2: Convert QUSB2 phy bindings to yaml Message-ID: <20200206172831.GA32685@bogus> References: <1580305919-30946-1-git-send-email-sanm@codeaurora.org> <1580305919-30946-2-git-send-email-sanm@codeaurora.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1580305919-30946-2-git-send-email-sanm@codeaurora.org> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Jan 29, 2020 at 07:21:52PM +0530, Sandeep Maheswaram wrote: > Convert QUSB2 phy bindings to DT schema format using json-schema. > > Signed-off-by: Sandeep Maheswaram > --- > .../devicetree/bindings/phy/qcom,qusb2-phy.yaml | 142 +++++++++++++++++++++ > .../devicetree/bindings/phy/qcom-qusb2-phy.txt | 68 ---------- > 2 files changed, 142 insertions(+), 68 deletions(-) > create mode 100644 Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml > delete mode 100644 Documentation/devicetree/bindings/phy/qcom-qusb2-phy.txt > > diff --git a/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml > new file mode 100644 > index 0000000..90b3cc6 > --- /dev/null > +++ b/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml > @@ -0,0 +1,142 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > + > +%YAML 1.2 > +--- > +$id: "http://devicetree.org/schemas/phy/qcom,qusb2-phy.yaml#" > +$schema: "http://devicetree.org/meta-schemas/core.yaml#" > + > +title: Qualcomm QUSB2 phy controller > + > +maintainers: > + - Manu Gautam > + > +description: > + QUSB2 controller supports LS/FS/HS usb connectivity on Qualcomm chipsets. > + > +properties: > + compatible: > + enum: > + - qcom,msm8996-qusb2-phy > + - qcom,msm8998-qusb2-phy > + - qcom,sdm845-qusb2-phy > + reg: > + maxItems: 1 > + > + "#phy-cells": > + const: 0 > + > + clocks: > + minItems: 2 > + items: > + - description: phy config clock > + - description: 19.2 MHz ref clk > + - description: phy interface clock (Optional) > + > + clock-names: > + minItems: 2 > + items: > + - const: cfg_ahb > + - const: ref > + - const: iface > + > + vdda-pll-supply: > + description: > + Phandle to 1.8V regulator supply to PHY refclk pll block. > + > + vdda-phy-dpdm-supply: > + description: > + Phandle to 3.1V regulator supply to Dp/Dm port signals. > + > + resets: > + maxItems: 1 > + > + nvmem-cells: > + maxItems: 1 > + description: > + Phandle to nvmem cell that contains 'HS Tx trim' > + tuning parameter value for qusb2 phy. > + > + qcom,tcsr-syscon: > + description: > + Phandle to TCSR syscon register region. > + $ref: /schemas/types.yaml#/definitions/cell s/cell/phandle/ With that, Reviewed-by: Rob Herring