From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.9 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0C0D6C352A4 for ; Fri, 7 Feb 2020 09:02:47 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D7D482082E for ; Fri, 7 Feb 2020 09:02:46 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="V11ZRlSV" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726857AbgBGJCq (ORCPT ); Fri, 7 Feb 2020 04:02:46 -0500 Received: from mail-pg1-f179.google.com ([209.85.215.179]:43904 "EHLO mail-pg1-f179.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726451AbgBGJCp (ORCPT ); Fri, 7 Feb 2020 04:02:45 -0500 Received: by mail-pg1-f179.google.com with SMTP id u131so781597pgc.10 for ; Fri, 07 Feb 2020 01:02:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=op1HXNhATyHRgyyhvfgTZxFzh1I8MPtGuBHJSPNyYOk=; b=V11ZRlSVoy8l/X+8crvCfDhWVEeNs7U6MYjmhE5PH3dH/QgD5ZXbfebDNDY+TVuxS2 EF3b24coOyyCvvlqkO2mz17Pdt1JPDmLGRFZyjnK4KtDkGILDVe4ZEvAT+LAPlLhWDkf nB7KDKdqJTaxNX4qtPaYyp522JBRelU6OJr8U= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=op1HXNhATyHRgyyhvfgTZxFzh1I8MPtGuBHJSPNyYOk=; b=oCNgSgHpRxdeRuIplnofTcWKg+BtJI+uglccHIGOpsjnLJsWTaXvSzF/2GH43gsV6y hBe2YX2DtWa4iJikqVh00morb9TDjGqDCebj+mqx4IdOFaPowbMaNWGlKsdbhut09DXK 2/brTCSzGVTZfDmmPnAn3Yjp1QgbBZahcs3U3neMCbnsVXhAzXOgpeb5Tvuc4Z8Z6e1y 4DLkrS/qEXDCmeXMPb9GyT1mQLKmQSzIQzgOUKl5Iy9wD5pTEr/qGMS5Z5ashjbcFzaP RjZzIZ4OwFhM/hHP1Y8bzgVYBuJf5FzuRTyl+yRc3qIyYfv7RIGgPdo1ydm4MrpVN2jt yVNw== X-Gm-Message-State: APjAAAWCig7KqfyavR3XNBTI9wz7U6Qet9x07INTAFw1AN3TJbVoSuWA KLFdb2bxmc9h5+cpD05/gRe1zA== X-Google-Smtp-Source: APXvYqxN/ldFiwGp0nM9WRPRSNpu6gFYZl5ZXHD3UiPJnYNWxmaakrmXDFCuyvReK7SQz/hZZl3wKg== X-Received: by 2002:a62:1a97:: with SMTP id a145mr9181514pfa.244.1581066165016; Fri, 07 Feb 2020 01:02:45 -0800 (PST) Received: from hsinyi-z840.tpe.corp.google.com ([2401:fa00:1:10:b852:bd51:9305:4261]) by smtp.gmail.com with ESMTPSA id w6sm2309463pfq.99.2020.02.07.01.02.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 07 Feb 2020 01:02:44 -0800 (PST) From: Hsin-Yi Wang To: linux-arm-kernel@lists.infradead.org Cc: Rob Herring , Mark Rutland , Matthias Brugger , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, Nicolas Boichat , Enric Balletbo i Serra , Daniel Kurtz Subject: [PATCH v6 0/5] Add mt8173 elm and hana board Date: Fri, 7 Feb 2020 17:02:23 +0800 Message-Id: <20200207090227.250720-1-hsinyi@chromium.org> X-Mailer: git-send-email 2.25.0.225.g125e21ebc7-goog MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This series adds devicetree and binding document for Acer Chromebook R13 (elm) and Lenovo Chromebook (hana), which are using mt8173 as SoC. Changes in v6: - fix several unit name warnings in mt8173.dtsi and mt8173-elm.dtsi Changes in v5: - add gpio-line-names for gpio controller Changes in v4: - fix dtbs_check errors on cros-ec-keyboard - add comments for second source touchscreen and trackpad Changes in v3: - address comments in v2, major changes include: * move uart aliases from mt8173-elm.dtsi to mt8173.dtsi * remove brightness-levels in backlight * add interrupt for da9211 * move pinmux for sdio_fixed_3v3 from mmc3_pins_default * remove some non upstream property * checked on schematic, cd-gpio in mmc1 should be GPIO_ACTIVE_LOW Changes in v2: - fix mediatek.yaml - fixup some nodes and remove unused nodes in dts Hsin-Yi Wang (5): dt-bindings: arm64: dts: mediatek: Add mt8173 elm and hana arm64: dts: mt8173: add uart aliases arm64: dts: mt8173: fix unit name warnings arm64: dts: mediatek: add mt8173 elm and hana board media: mtk-mdp: Use correct aliases name .../devicetree/bindings/arm/mediatek.yaml | 22 + arch/arm64/boot/dts/mediatek/Makefile | 3 + .../dts/mediatek/mt8173-elm-hana-rev7.dts | 27 + .../boot/dts/mediatek/mt8173-elm-hana.dts | 14 + .../boot/dts/mediatek/mt8173-elm-hana.dtsi | 70 + arch/arm64/boot/dts/mediatek/mt8173-elm.dts | 14 + arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi | 1166 +++++++++++++++++ arch/arm64/boot/dts/mediatek/mt8173.dtsi | 43 +- drivers/media/platform/mtk-mdp/mtk_mdp_comp.c | 8 +- 9 files changed, 1343 insertions(+), 24 deletions(-) create mode 100644 arch/arm64/boot/dts/mediatek/mt8173-elm-hana-rev7.dts create mode 100644 arch/arm64/boot/dts/mediatek/mt8173-elm-hana.dts create mode 100644 arch/arm64/boot/dts/mediatek/mt8173-elm-hana.dtsi create mode 100644 arch/arm64/boot/dts/mediatek/mt8173-elm.dts create mode 100644 arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi -- 2.25.0.225.g125e21ebc7-goog