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charset=utf-8 Content-Disposition: inline In-Reply-To: <1581506488-26881-2-git-send-email-sanm@codeaurora.org> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Sandeep, On Wed, Feb 12, 2020 at 04:51:25PM +0530, Sandeep Maheswaram wrote: > Convert QMP phy bindings to DT schema format using json-schema. nit: s/phy bindings/PHY bindings/ > Signed-off-by: Sandeep Maheswaram > --- > .../devicetree/bindings/phy/qcom,qmp-phy.yaml | 283 +++++++++++++++++++++ > .../devicetree/bindings/phy/qcom-qmp-phy.txt | 227 ----------------- > 2 files changed, 283 insertions(+), 227 deletions(-) > create mode 100644 Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml > delete mode 100644 Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt > > diff --git a/Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml > new file mode 100644 > index 0000000..b39a594 > --- /dev/null > +++ b/Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml > @@ -0,0 +1,283 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > + > +%YAML 1.2 > +--- > +$id: "http://devicetree.org/schemas/phy/qcom,qmp-phy.yaml#" > +$schema: "http://devicetree.org/meta-schemas/core.yaml#" > + > +title: Qualcomm QMP PHY controller > + > +maintainers: > + - Manu Gautam > + > +description: > + QMP phy controller supports physical layer functionality for a number of > + controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB. > + > +properties: > + compatible: > + enum: > + - qcom,ipq8074-qmp-pcie-phy > + - qcom,msm8996-qmp-pcie-phy > + - qcom,msm8996-qmp-usb3-phy > + - qcom,msm8998-qmp-usb3-phy > + - qcom,msm8998-qmp-ufs-phy > + - qcom,msm8998-qmp-pcie-phy > + - qcom,sdm845-qmp-usb3-phy > + - qcom,sdm845-qmp-usb3-uni-phy > + - qcom,sdm845-qmp-ufs-phy > + - qcom,sm8150-qmp-ufs-phy nit: sort in alphabetical order (i.e. -pcie, -ufs, -usb3)? > + > + reg: > + minItems: 1 > + items: > + - description: Address and length of PHY's common serdes block. > + - description: Address and length of the DP_COM control block. > + > + reg-names: > + items: > + - const: reg-base > + - const: dp_com > + > + "#clock-cells": > + enum: [ 1, 2 ] > + > + "#address-cells": > + enum: [ 1, 2 ] > + > + "#size-cells": > + enum: [ 1, 2 ] > + > + clocks: > + maxItems: 4 > + minItems: 1 nit: minItems before maxItems, which is the order humans expect, also it is the prevalent order in other .yaml bindings. Do we actually need min/maxItems? I would expect the below rules for each compatible string to take care of it, however I'm not a schema expert. > + > + clock-names: > + maxItems: 4 > + minItems: 1 > + resets: > + maxItems: 3 > + minItems: 1 > + > + reset-names: > + maxItems: 3 > + minItems: 1 > + > + vdda-phy-supply: > + description: > + Phandle to a regulator supply to PHY core block. > + > + vdda-pll-supply: > + description: > + Phandle to 1.8V regulator supply to PHY refclk pll block. > + > + vddp-ref-clk-supply: > + description: > + Phandle to a regulator supply to any specific refclk > + pll block. > + > +#Required nodes: > +patternProperties: > + "^lanes@[0-9a-f]+$": > + type: object > + description: > + Each device node of QMP phy is required to have as many child nodes as > + the number of lanes the PHY has. > + > +required: > + - compatible > + - reg > + - "#clock-cells" > + - "#address-cells" > + - "#size-cells" > + - clocks > + - clock-names > + - resets > + - reset-names > + - vdda-phy-supply > + - vdda-pll-supply > + > +additionalProperties: false > + > +allOf: > + - if: > + properties: > + compatible: > + contains: > + enum: fix indentation (2 blanks, not 3) > + - qcom,sdm845-qmp-usb3-phy > + - qcom,sdm845-qmp-usb3-uni-phy > + then: > + properties: > + clocks: > + items: > + - description: Phy aux clock. > + - description: Phy config clock. > + - description: 19.2 MHz ref clk. > + - description: Phy common block aux clock. > + clock-names: > + items: > + - const: aux > + - const: cfg_ahb > + - const: ref > + - const: com_aux > + resets: > + items: > + - description: reset of phy block. > + - description: phy common block reset. > + reset-names: > + items: > + - const: phy > + - const: common fix indentation (3 -> 2) > + - if: > + properties: > + compatible: > + contains: > + enum: fix indentation (3 -> 2) > + - qcom,msm8996-qmp-pcie-phy > + then: > + properties: > + clocks: > + items: > + - description: Phy aux clock. > + - description: Phy config clock. > + - description: 19.2 MHz ref clk. > + nit: remove empty line or add it everywhere. > + clock-names: > + items: > + - const: aux > + - const: cfg_ahb > + - const: ref > + resets: > + items: > + - description: reset of phy block. > + - description: phy common block reset. > + - description: phy's ahb cfg block reset. > + reset-names: > + items: > + - const: phy > + - const: common > + - const: cfg fix indentation (3 -> 2) > + - if: > + properties: > + compatible: > + contains: > + enum: fix indentation (3 -> 2) > + - qcom,msm8996-qmp-pcie-phy > + - qcom,msm8996-qmp-usb3-phy > + - qcom,msm8998-qmp-pcie-phy > + - qcom,msm8998-qmp-usb3-phy > + then: > + properties: > + clocks: > + items: > + - description: Phy aux clock. > + - description: Phy config clock. > + - description: 19.2 MHz ref clk. > + clock-names: > + items: > + - const: aux > + - const: cfg_ahb > + - const: ref > + resets: > + items: > + - description: reset of phy block. > + - description: phy common block reset. > + reset-names: > + items: > + - const: phy > + - const: common According to the .txt binding this is not correct for 'qcom,msm8996-qmp-pcie-phy': For "qcom,msm8996-qmp-pcie-phy" must contain: "phy", "common", "cfg". This also matches the actual use in arch/arm64/boot/dts/qcom/msm8996.dtsi Also the indentation needs to be fixed (3 -> 2) > + - if: > + properties: > + compatible: > + contains: > + enum: fix indentation (3 -> 2) > + - qcom,msm8998-qmp-ufs-phy > + - qcom,sdm845-qmp-ufs-phy > + - qcom,sm8150-qmp-ufs-phy > + then: > + properties: > + clocks: > + items: > + - description: 19.2 MHz ref clk. > + - description: Phy reference aux clock. > + clock-names: > + items: > + - const: ref > + - const: ref_aux > + resets: > + items: > + - description: PHY reset in the UFS controller. > + reset-names: > + items: > + - const: ufsphy > + - if: > + properties: > + compatible: > + contains: > + enum: fix indentation (3 -> 2) Thanks Matthias