From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.6 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 013A5C3B186 for ; Wed, 12 Feb 2020 23:53:22 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C4526206E5 for ; Wed, 12 Feb 2020 23:53:21 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="fElF03yX" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729592AbgBLXxQ (ORCPT ); Wed, 12 Feb 2020 18:53:16 -0500 Received: from mail-lj1-f195.google.com ([209.85.208.195]:41691 "EHLO mail-lj1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729176AbgBLXwP (ORCPT ); Wed, 12 Feb 2020 18:52:15 -0500 Received: by mail-lj1-f195.google.com with SMTP id h23so4429972ljc.8; Wed, 12 Feb 2020 15:52:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=3EV1PC0QWQ4iiSQr3HOwuq2bA+sCADJaaEopIh9Lc/U=; b=fElF03yXchL4Zpx0ZCCsZ4PojTzTb6n/LIdP5GtRbU39VR9emlgOBP2pXSHJuEJtqh C9ygyGKJW1Pfqkk5hLjw82ZMgjHbfmk4FLcxFMhpxiSNwmPY0SH4xygKNrhtRcyHZ1yX LQdOhT/dXYHGR+mgcpRN8deYWFTt/Z1+Y8QMBbGVwoSoR9bGMGwN0eyL566b0P6GdmBG 8/jb46hEs4ZR82ItqTrDfZPY+MfdTZcAEcar9ATO6bS+AWbsvKVTTSDe+BgtwKjs7xWv bpLd3TsIdwyGzDgGPerNLyeQSaWnqTLRRHs4q3j4yxL3Xp1IMktzoQA8k10BWZGn7yLm sKLw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=3EV1PC0QWQ4iiSQr3HOwuq2bA+sCADJaaEopIh9Lc/U=; b=PECA5sdUjVfVLS2eX3rCiUWnSujP7GYOoBhCIgPyi28p6L1MraE5xSSavaGspN8Li1 lEFRys8r5lOIOgRqgpncDYHXwEaM6c/KeLKRDoQuo0QKvvrHEVjCOEFcXbNGyYfmFiM+ dalFXIYFDg3otblvKt2UB8CDGfq2Q/5/2bsz6w+legrKRQrdNyNRnaGs7vUREdUOYXXq al5zh2DO3t2k5WqheXV28sRIFBNA28IuAqp5F3dLqxsbgulEyBei4U7cfoadRzPdwbys JWvoIHvxttGKidEKU7bMWM9KTT7yGHiOEvx1kkN7Jr0Ud1gqoI2in02egU0l0nm5dGMn cubw== X-Gm-Message-State: APjAAAWH3HCkyyAZVlhecOYJOkOghvMW6r56+5jXMAtU3/eQ9yXfYrK4 z5t8NZaHLqJmuynlQn/VzwA= X-Google-Smtp-Source: APXvYqwwYWJl8wxqkdlZoIAdrzltdHpKjeZCARKmBwAH3LyCysaTIWBrviUs/TssWj08IUlOatscBA== X-Received: by 2002:a2e:8e70:: with SMTP id t16mr9302547ljk.73.1581551533216; Wed, 12 Feb 2020 15:52:13 -0800 (PST) Received: from localhost.localdomain (79-139-233-37.dynamic.spd-mgts.ru. [79.139.233.37]) by smtp.gmail.com with ESMTPSA id d5sm251686lfb.20.2020.02.12.15.52.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Feb 2020 15:52:12 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , "Rafael J. Wysocki" , Daniel Lezcano , =?UTF-8?q?Micha=C5=82=20Miros=C5=82aw?= , Jasper Korten , David Heidelberg , Peter Geis Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v9 04/17] ARM: tegra: Change tegra_set_cpu_in_lp2() type to void Date: Thu, 13 Feb 2020 02:51:21 +0300 Message-Id: <20200212235134.12638-5-digetx@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20200212235134.12638-1-digetx@gmail.com> References: <20200212235134.12638-1-digetx@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The Tegra30 CPUIDLE driver has intention to check whether primary CPU was the last CPU that entered LP2 (CC6) idle-state, but that functionality never got utilized because driver never supported the CC6 state for the case where any secondary CPU is online. The new cpuidle driver will properly support CC6 on Tegra30, including the case where secondary CPUs are online, and that knowledge about what CPUs entered into CC6 won't be needed at all because new driver will use different approach by making use of the coupled idle-state and explicitly parking secondary CPUs before entering into CC6. Thus this patch is just a minor cleanup change. Acked-by: Peter De Schrijver Tested-by: Peter Geis Tested-by: Jasper Korten Tested-by: David Heidelberg Signed-off-by: Dmitry Osipenko --- arch/arm/mach-tegra/cpuidle-tegra30.c | 14 ++++---------- arch/arm/mach-tegra/pm.c | 8 +------- arch/arm/mach-tegra/pm.h | 2 +- 3 files changed, 6 insertions(+), 18 deletions(-) diff --git a/arch/arm/mach-tegra/cpuidle-tegra30.c b/arch/arm/mach-tegra/cpuidle-tegra30.c index c6128526877d..a3ce8dabfe18 100644 --- a/arch/arm/mach-tegra/cpuidle-tegra30.c +++ b/arch/arm/mach-tegra/cpuidle-tegra30.c @@ -98,22 +98,16 @@ static int tegra30_idle_lp2(struct cpuidle_device *dev, int index) { bool entered_lp2 = false; - bool last_cpu; local_fiq_disable(); - last_cpu = tegra_set_cpu_in_lp2(); + tegra_set_cpu_in_lp2(); cpu_pm_enter(); - if (dev->cpu == 0) { - if (last_cpu) - entered_lp2 = tegra30_cpu_cluster_power_down(dev, drv, - index); - else - cpu_do_idle(); - } else { + if (dev->cpu == 0) + entered_lp2 = tegra30_cpu_cluster_power_down(dev, drv, index); + else entered_lp2 = tegra30_cpu_core_power_down(dev, drv, index); - } cpu_pm_exit(); tegra_clear_cpu_in_lp2(); diff --git a/arch/arm/mach-tegra/pm.c b/arch/arm/mach-tegra/pm.c index 1ff499068bb1..a72f9a2d3cb7 100644 --- a/arch/arm/mach-tegra/pm.c +++ b/arch/arm/mach-tegra/pm.c @@ -123,11 +123,9 @@ void tegra_clear_cpu_in_lp2(void) spin_unlock(&tegra_lp2_lock); } -bool tegra_set_cpu_in_lp2(void) +void tegra_set_cpu_in_lp2(void) { int phy_cpu_id = cpu_logical_map(smp_processor_id()); - bool last_cpu = false; - cpumask_t *cpu_lp2_mask = tegra_cpu_lp2_mask; u32 *cpu_in_lp2 = tegra_cpu_lp2_mask; spin_lock(&tegra_lp2_lock); @@ -135,11 +133,7 @@ bool tegra_set_cpu_in_lp2(void) BUG_ON((*cpu_in_lp2 & BIT(phy_cpu_id))); *cpu_in_lp2 |= BIT(phy_cpu_id); - if ((phy_cpu_id == 0) && cpumask_equal(cpu_lp2_mask, cpu_online_mask)) - last_cpu = true; - spin_unlock(&tegra_lp2_lock); - return last_cpu; } static int tegra_sleep_cpu(unsigned long v2p) diff --git a/arch/arm/mach-tegra/pm.h b/arch/arm/mach-tegra/pm.h index b9cc12222bb1..2c294f6365c0 100644 --- a/arch/arm/mach-tegra/pm.h +++ b/arch/arm/mach-tegra/pm.h @@ -24,7 +24,7 @@ void tegra30_lp1_iram_hook(void); void tegra30_sleep_core_init(void); void tegra_clear_cpu_in_lp2(void); -bool tegra_set_cpu_in_lp2(void); +void tegra_set_cpu_in_lp2(void); void tegra_idle_lp2_last(void); extern void (*tegra_tear_down_cpu)(void); -- 2.24.0