From: Andre Przywara <andre.przywara@arm.com>
To: Rob Herring <robh@kernel.org>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Cc: Robert Richter <rric@kernel.org>,
soc@kernel.org, Jon Loeliger <jdl@jdl.com>,
Mark Langsdorf <mlangsdo@redhat.com>,
Eric Auger <eric.auger@redhat.com>, Will Deacon <will@kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>
Subject: [PATCH 09/13] dt-bindings: arm: Convert Calxeda L2 cache controller to json-schema
Date: Wed, 26 Feb 2020 18:08:57 +0000 [thread overview]
Message-ID: <20200226180901.89940-10-andre.przywara@arm.com> (raw)
In-Reply-To: <20200226180901.89940-1-andre.przywara@arm.com>
Convert the L2-ECC controller binding to DT schema format using
json-schema.
This is indented to be just used for error reporting.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
.../devicetree/bindings/arm/calxeda/l2ecc.txt | 15 --------
.../bindings/arm/calxeda/l2ecc.yaml | 36 +++++++++++++++++++
2 files changed, 36 insertions(+), 15 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/calxeda/l2ecc.txt
create mode 100644 Documentation/devicetree/bindings/arm/calxeda/l2ecc.yaml
diff --git a/Documentation/devicetree/bindings/arm/calxeda/l2ecc.txt b/Documentation/devicetree/bindings/arm/calxeda/l2ecc.txt
deleted file mode 100644
index 94e642a33db0..000000000000
--- a/Documentation/devicetree/bindings/arm/calxeda/l2ecc.txt
+++ /dev/null
@@ -1,15 +0,0 @@
-Calxeda Highbank L2 cache ECC
-
-Properties:
-- compatible : Should be "calxeda,hb-sregs-l2-ecc"
-- reg : Address and size for ECC error interrupt clear registers.
-- interrupts : Should be single bit error interrupt, then double bit error
- interrupt.
-
-Example:
-
- sregs@fff3c200 {
- compatible = "calxeda,hb-sregs-l2-ecc";
- reg = <0xfff3c200 0x100>;
- interrupts = <0 71 4 0 72 4>;
- };
diff --git a/Documentation/devicetree/bindings/arm/calxeda/l2ecc.yaml b/Documentation/devicetree/bindings/arm/calxeda/l2ecc.yaml
new file mode 100644
index 000000000000..25c022766f0c
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/calxeda/l2ecc.yaml
@@ -0,0 +1,36 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/calxeda/l2ecc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Calxeda Highbank L2 cache ECC
+
+description: |
+ Binding for the Calxeda Highbank L2 cache controller ECC device.
+ This does not cover the actual L2 cache controller control registers,
+ but just the error reporting functionality.
+
+maintainers:
+ - Andre Przywara <andre.przywara@arm.com>
+
+properties:
+ compatible:
+ const: "calxeda,hb-sregs-l2-ecc"
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ description: |
+ Should be single bit error interrupt, then double bit error interrupt.
+ minItems: 2
+ maxItems: 2
+
+examples:
+ - |
+ sregs@fff3c200 {
+ compatible = "calxeda,hb-sregs-l2-ecc";
+ reg = <0xfff3c200 0x100>;
+ interrupts = <0 71 4>, <0 72 4>;
+ };
--
2.17.1
next prev parent reply other threads:[~2020-02-26 18:09 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-26 18:08 [PATCH 00/13] arm: calxeda: update DTS, bindings and MAINTAINERS Andre Przywara
2020-02-26 18:08 ` [PATCH 01/13] arm: dts: calxeda: Basic DT file fixes Andre Przywara
2020-02-26 18:08 ` [PATCH 02/13] arm: dts: calxeda: Provide UART clock Andre Przywara
2020-02-26 18:08 ` [PATCH 03/13] arm: dts: calxeda: Fix interrupt grouping Andre Przywara
2020-02-26 18:08 ` [PATCH 04/13] arm: dts: calxeda: Group port-phys and sgpio-gpio items Andre Przywara
2020-02-26 18:08 ` [PATCH 05/13] dt-bindings: clock: Convert Calxeda clock bindings to json-schema Andre Przywara
2020-02-26 18:24 ` Maxime Ripard
2020-02-26 18:08 ` [PATCH 06/13] dt-bindings: sata: Convert Calxeda SATA controller " Andre Przywara
2020-02-26 18:25 ` Maxime Ripard
2020-02-26 18:08 ` [PATCH 07/13] dt-bindings: net: Convert Calxeda Ethernet binding " Andre Przywara
2020-02-26 18:26 ` Maxime Ripard
2020-02-26 18:08 ` [PATCH 08/13] dt-bindings: phy: Convert Calxeda ComboPHY " Andre Przywara
2020-02-26 18:26 ` Maxime Ripard
2020-02-26 18:08 ` Andre Przywara [this message]
2020-02-26 18:08 ` [PATCH 10/13] dt-bindings: memory-controllers: convert Calxeda DDR " Andre Przywara
2020-02-26 18:27 ` Maxime Ripard
2020-02-26 18:08 ` [PATCH 11/13] dt-bindings: ipmi: Convert IPMI-SMIC bindings " Andre Przywara
2020-02-26 18:09 ` [PATCH 12/13] dt-bindings: arm: Add Calxeda system registers json-schema binding Andre Przywara
2020-02-26 21:57 ` Rob Herring
2020-02-27 0:12 ` André Przywara
2020-02-27 14:44 ` Rob Herring
2020-02-26 18:09 ` [PATCH 13/13] MAINTAINERS: Update Calxeda Highbank maintainership Andre Przywara
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