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Wed, 26 Feb 2020 13:27:46 -0500 (EST) Date: Wed, 26 Feb 2020 19:27:45 +0100 From: Maxime Ripard To: Andre Przywara Cc: Rob Herring , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Robert Richter , soc@kernel.org, Jon Loeliger , Mark Langsdorf , Eric Auger , Will Deacon , Catalin Marinas Subject: Re: [PATCH 10/13] dt-bindings: memory-controllers: convert Calxeda DDR to json-schema Message-ID: <20200226182745.gevcx3zb6hgewdnx@gilmour.lan> References: <20200226180901.89940-1-andre.przywara@arm.com> <20200226180901.89940-11-andre.przywara@arm.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="vy5cdj22bi4li54x" Content-Disposition: inline In-Reply-To: <20200226180901.89940-11-andre.przywara@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --vy5cdj22bi4li54x Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Wed, Feb 26, 2020 at 06:08:58PM +0000, Andre Przywara wrote: > Convert the Calxeda DDR memory controller binding to DT schema format > using json-schema. > Although this technically covers the whole DRAM controller, the > intention to use it only for error reporting and mapping fault addresses > to DRAM chips. > > Signed-off-by: Andre Przywara > --- > .../memory-controllers/calxeda-ddr-ctrlr.txt | 16 -------- > .../memory-controllers/calxeda-ddr-ctrlr.yaml | 41 +++++++++++++++++++ > 2 files changed, 41 insertions(+), 16 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/memory-controllers/calxeda-ddr-ctrlr.txt > create mode 100644 Documentation/devicetree/bindings/memory-controllers/calxeda-ddr-ctrlr.yaml > > diff --git a/Documentation/devicetree/bindings/memory-controllers/calxeda-ddr-ctrlr.txt b/Documentation/devicetree/bindings/memory-controllers/calxeda-ddr-ctrlr.txt > deleted file mode 100644 > index 049675944b78..000000000000 > --- a/Documentation/devicetree/bindings/memory-controllers/calxeda-ddr-ctrlr.txt > +++ /dev/null > @@ -1,16 +0,0 @@ > -Calxeda DDR memory controller > - > -Properties: > -- compatible : Should be: > - - "calxeda,hb-ddr-ctrl" for ECX-1000 > - - "calxeda,ecx-2000-ddr-ctrl" for ECX-2000 > -- reg : Address and size for DDR controller registers. > -- interrupts : Interrupt for DDR controller. > - > -Example: > - > - memory-controller@fff00000 { > - compatible = "calxeda,hb-ddr-ctrl"; > - reg = <0xfff00000 0x1000>; > - interrupts = <0 91 4>; > - }; > diff --git a/Documentation/devicetree/bindings/memory-controllers/calxeda-ddr-ctrlr.yaml b/Documentation/devicetree/bindings/memory-controllers/calxeda-ddr-ctrlr.yaml > new file mode 100644 > index 000000000000..c5153127e722 > --- /dev/null > +++ b/Documentation/devicetree/bindings/memory-controllers/calxeda-ddr-ctrlr.yaml > @@ -0,0 +1,41 @@ > +# SPDX-License-Identifier: GPL-2.0 > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/memory-controllers/calxeda-ddr-ctrlr.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Calxeda DDR memory controller binding > + > +description: | > + The Calxeda DDR memory controller is initialised and programmed by the > + firmware, but an OS might want to read its registers for error reporting > + purposes and to learn about the DRAM topology. > + > +maintainers: > + - Andre Przywara > + > +properties: > + compatible: > + items: > + - enum: > + - calxeda,hb-ddr-ctrl > + - calxeda,ecx-2000-ddr-ctrl You don't need the items here, you can just have the enum directly (like you did in your other schemas). > + reg: > + maxItems: 1 > + > + interrupts: > + maxItems: 1 > + > +required: > + - compatible > + - reg > + - interrupts And you're probably missing additionalProperties too (and in other schemas). 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