From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6E330C4BA20 for ; Wed, 26 Feb 2020 18:36:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 4F1E020732 for ; Wed, 26 Feb 2020 18:36:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727091AbgBZSgt (ORCPT ); Wed, 26 Feb 2020 13:36:49 -0500 Received: from muru.com ([72.249.23.125]:57848 "EHLO muru.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726878AbgBZSgs (ORCPT ); Wed, 26 Feb 2020 13:36:48 -0500 Received: from atomide.com (localhost [127.0.0.1]) by muru.com (Postfix) with ESMTPS id 5B3598022; Wed, 26 Feb 2020 18:37:33 +0000 (UTC) Date: Wed, 26 Feb 2020 10:36:45 -0800 From: Tony Lindgren To: Kishon Vijay Abraham I Cc: =?utf-8?Q?Beno=C3=AEt?= Cousson , Rob Herring , Mark Rutland , linux-omap@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] ARM: dts: dra7: Add "dma-ranges" property to PCIe RC DT nodes Message-ID: <20200226183645.GW37466@atomide.com> References: <20200128064147.18276-1-kishon@ti.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200128064147.18276-1-kishon@ti.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org * Kishon Vijay Abraham I [200127 22:39]: > 'dma-ranges' in a PCI bridge node does correctly set dma masks for PCI > devices not described in the DT. Certain DRA7 platforms (e.g., DRA76) > has RAM above 32-bit boundary (accessible with LPAE config) though the > PCIe bridge will be able to access only 32-bits. Add 'dma-ranges' > property in PCIe RC DT nodes to indicate the host bridge can access > only 32 bits. Sorry looks like I missed this fix earlier, applying into fixes. Thanks, Tony