From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, UNPARSEABLE_RELAY,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 10038C11D3D for ; Thu, 27 Feb 2020 18:09:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id EB6B0246A1 for ; Thu, 27 Feb 2020 18:09:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730599AbgB0SJP (ORCPT ); Thu, 27 Feb 2020 13:09:15 -0500 Received: from bhuna.collabora.co.uk ([46.235.227.227]:40874 "EHLO bhuna.collabora.co.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729232AbgB0SJP (ORCPT ); Thu, 27 Feb 2020 13:09:15 -0500 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: eballetbo) with ESMTPSA id 51B232964A8 From: Enric Balletbo i Serra To: robh+dt@kernel.org, mark.rutland@arm.com, ck.hu@mediatek.com, p.zabel@pengutronix.de, airlied@linux.ie, mturquette@baylibre.com, sboyd@kernel.org, ulrich.hecht+renesas@gmail.com, laurent.pinchart@ideasonboard.com Cc: Mauro Carvalho Chehab , rdunlap@infradead.org, dri-devel@lists.freedesktop.org, Weiyi Lu , Seiya Wang , linux-clk@vger.kernel.org, Collabora Kernel ML , mtk01761 , Allison Randal , Thomas Gleixner , wens@csie.org, Kate Stewart , Greg Kroah-Hartman , Houlong Wei , Matthias Brugger , linux-media@vger.kernel.org, devicetree@vger.kernel.org, sean.wang@mediatek.com, frank-w@public-files.de, Minghsiu Tsai , Andrew-CT Chen , linux-mediatek@lists.infradead.org, hsinyi@chromium.org, Matthias Brugger , linux-arm-kernel@lists.infradead.org, Richard Fontana , linux-kernel@vger.kernel.org, matthias.bgg@kernel.org, Daniel Vetter Subject: [PATCH v10 2/5] dt-bindings: mediatek: Update mmsys binding to reflect it is a system controller Date: Thu, 27 Feb 2020 19:08:55 +0100 Message-Id: <20200227180858.1514157-3-enric.balletbo@collabora.com> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200227180858.1514157-1-enric.balletbo@collabora.com> References: <20200227180858.1514157-1-enric.balletbo@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The mmsys system controller is not only a pure clock controller, so update the binding documentation to reflect that apart from providing clocks, it also provides routing and miscellaneous control registers. Signed-off-by: Enric Balletbo i Serra --- Changes in v10: - Update the binding documentation for the mmsys system controller. Changes in v9: None Changes in v8: None Changes in v7: None .../devicetree/bindings/arm/mediatek/mediatek,mmsys.txt | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt index 301eefbe1618..8d6a9d98e7a6 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt @@ -1,7 +1,8 @@ Mediatek mmsys controller ============================ -The Mediatek mmsys controller provides various clocks to the system. +The Mediatek mmsys system controller provides clock control, routing control, +and miscellaneous control in mmsys partition. Required Properties: @@ -15,13 +16,13 @@ Required Properties: - "mediatek,mt8183-mmsys", "syscon" - #clock-cells: Must be 1 -The mmsys controller uses the common clk binding from +For the clock control, the mmsys controller uses the common clk binding from Documentation/devicetree/bindings/clock/clock-bindings.txt The available clocks are defined in dt-bindings/clock/mt*-clk.h. Example: -mmsys: clock-controller@14000000 { +mmsys: syscon@14000000 { compatible = "mediatek,mt8173-mmsys", "syscon"; reg = <0 0x14000000 0 0x1000>; #clock-cells = <1>; -- 2.25.0