[PATCH v5 0/4] platform/chrome: Add Type C connector class driver

[PATCH v5 0/4] platform/chrome: Add Type C connector class driver

[Prashant Malani]

The following series introduces a Type C port driver for Chrome OS
devices that have an EC (Embedded Controller). It derives port
information from ACPI or DT entries. This patch series adds basic
support, including registering ports, and setting certain basic
attributes.

v4: https://lkml.org/lkml/2020/3/12/1120
v3: https://lkml.org/lkml/2020/2/19/1230
v2: https://lkml.org/lkml/2020/2/7/646
v1: https://lkml.org/lkml/2020/2/5/676

Changes in v5:
- Updated DT binding license identifier.
- Updated DT binding to have full example.
- Added missing Reviewed-by tag to Patch 2/4.

Prashant Malani (4):
  dt-bindings: Add cros-ec Type C port driver
  platform/chrome: Add Type C connector class driver
  platform/chrome: typec: Get PD_CONTROL cmd version
  platform/chrome: typec: Update port info from EC

 .../bindings/chrome/google,cros-ec-typec.yaml |  54 +++
 drivers/platform/chrome/Kconfig               |  11 +
 drivers/platform/chrome/Makefile              |   1 +
 drivers/platform/chrome/cros_ec_typec.c       | 357 ++++++++++++++++++
 4 files changed, 423 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/chrome/google,cros-ec-typec.yaml
 create mode 100644 drivers/platform/chrome/cros_ec_typec.c

-- 
2.25.1.481.gfbce0eb801-goog

[PATCH v5 1/4] dt-bindings: Add cros-ec Type C port driver

[Prashant Malani]

Some Chrome OS devices with Embedded Controllers (EC) can read and
modify Type C port state.

Add an entry in the DT Bindings documentation that lists out the logical
device and describes the relevant port information, to be used by the
corresponding driver.

Signed-off-by: Prashant Malani <pmalani@chromium.org>
---

Changes in v5:
- Updated License identifier.
- Updated DT example to be a full example.

Changes in v4:
- Rebased on top of usb-connector.yaml, so the connector property now
  directly references the usb-connector DT binding.

 .../bindings/chrome/google,cros-ec-typec.yaml | 54 +++++++++++++++++++
 1 file changed, 54 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/chrome/google,cros-ec-typec.yaml

diff --git a/Documentation/devicetree/bindings/chrome/google,cros-ec-typec.yaml b/Documentation/devicetree/bindings/chrome/google,cros-ec-typec.yaml
new file mode 100644
index 0000000000000..6d7396ab8beec
--- /dev/null
+++ b/Documentation/devicetree/bindings/chrome/google,cros-ec-typec.yaml
@@ -0,0 +1,54 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/chrome/google,cros-ec-typec.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Google Chrome OS EC(Embedded Controller) Type C port driver.
+
+maintainers:
+  - Benson Leung <bleung@chromium.org>
+  - Prashant Malani <pmalani@chromium.org>
+
+description:
+  Chrome OS devices have an Embedded Controller(EC) which has access to
+  Type C port state. This node is intended to allow the host to read and
+  control the Type C ports. The node for this device should be under a
+  cros-ec node like google,cros-ec-spi.
+
+properties:
+  compatible:
+    const: google,cros-ec-typec
+
+  connector:
+    $ref: /schemas/connector/usb-connector.yaml#
+
+required:
+  - compatible
+
+examples:
+  - |+
+    spi0 {
+      #address-cells = <1>;
+      #size-cells = <0>;
+
+      cros_ec: ec@0 {
+        compatible = "google,cros-ec-spi";
+        reg = <0>;
+
+        typec {
+          compatible = "google,cros-ec-typec";
+
+          #address-cells = <1>;
+          #size-cells = <0>;
+
+          connector@0 {
+            compatible = "usb-c-connector";
+            reg = <0>;
+            power-role = "dual";
+            data-role = "dual";
+            try-power-role = "source";
+          };
+        };
+      };
+    };
-- 
2.25.1.481.gfbce0eb801-goog

[PATCH v5 2/4] platform/chrome: Add Type C connector class driver

[Prashant Malani]

Add a driver to implement the Type C connector class for Chrome OS
devices with ECs (Embedded Controllers).

The driver relies on firmware device specifications for various port
attributes. On ACPI platforms, this is specified using the logical
device with HID GOOG0014. On DT platforms, this is specified using the
DT node with compatible string "google,cros-ec-typec".

The driver reads the device FW node and uses the port attributes to
register the typec ports with the Type C connector class framework, but
doesn't do much else.

Subsequent patches will add more functionality to the driver, including
obtaining current port information (polarity, vconn role, current power
role etc.) after querying the EC.

Signed-off-by: Prashant Malani <pmalani@chromium.org>
Reviewed-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
---

Changes in v5:
- Added Reviewed-by tag which was missed in earlier version.

Changes in v4:
- Added Reviewed-by tag from previous review cycle
- Added code to store port caps within the Cros EC type C data structure
- Added code to use reg to get the port-number in DT platforms.

Changes in v3:
- Fixed minor spacing nits, and moved a modification to probe() if check
  from later patch to here instead.

Changes in v2:
- Updated Kconfig to default to MFD_CROS_EC_DEV.
- Fixed code comments.
- Moved get_num_ports() code into probe().
- Added module author.

 drivers/platform/chrome/Kconfig         |  11 ++
 drivers/platform/chrome/Makefile        |   1 +
 drivers/platform/chrome/cros_ec_typec.c | 238 ++++++++++++++++++++++++
 3 files changed, 250 insertions(+)
 create mode 100644 drivers/platform/chrome/cros_ec_typec.c

diff --git a/drivers/platform/chrome/Kconfig b/drivers/platform/chrome/Kconfig
index 5f57282a28da0..2320a4f0d9301 100644
--- a/drivers/platform/chrome/Kconfig
+++ b/drivers/platform/chrome/Kconfig
@@ -214,6 +214,17 @@ config CROS_EC_SYSFS
 	  To compile this driver as a module, choose M here: the
 	  module will be called cros_ec_sysfs.
 
+config CROS_EC_TYPEC
+	tristate "ChromeOS EC Type-C Connector Control"
+	depends on MFD_CROS_EC_DEV && TYPEC
+	default MFD_CROS_EC_DEV
+	help
+	  If you say Y here, you get support for accessing Type C connector
+	  information from the Chrome OS EC.
+
+	  To compile this driver as a module, choose M here: the module will be
+	  called cros_ec_typec.
+
 config CROS_USBPD_LOGGER
 	tristate "Logging driver for USB PD charger"
 	depends on CHARGER_CROS_USBPD
diff --git a/drivers/platform/chrome/Makefile b/drivers/platform/chrome/Makefile
index aacd5920d8a18..caf2a9cdb5e6d 100644
--- a/drivers/platform/chrome/Makefile
+++ b/drivers/platform/chrome/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_CROS_EC_ISHTP)		+= cros_ec_ishtp.o
 obj-$(CONFIG_CROS_EC_RPMSG)		+= cros_ec_rpmsg.o
 obj-$(CONFIG_CROS_EC_SPI)		+= cros_ec_spi.o
 cros_ec_lpcs-objs			:= cros_ec_lpc.o cros_ec_lpc_mec.o
+obj-$(CONFIG_CROS_EC_TYPEC)		+= cros_ec_typec.o
 obj-$(CONFIG_CROS_EC_LPC)		+= cros_ec_lpcs.o
 obj-$(CONFIG_CROS_EC_PROTO)		+= cros_ec_proto.o cros_ec_trace.o
 obj-$(CONFIG_CROS_KBD_LED_BACKLIGHT)	+= cros_kbd_led_backlight.o
diff --git a/drivers/platform/chrome/cros_ec_typec.c b/drivers/platform/chrome/cros_ec_typec.c
new file mode 100644
index 0000000000000..02e6d5cbbbf7a
--- /dev/null
+++ b/drivers/platform/chrome/cros_ec_typec.c
@@ -0,0 +1,238 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright 2020 Google LLC
+ *
+ * This driver provides the ability to view and manage Type C ports through the
+ * Chrome OS EC.
+ */
+
+#include <linux/acpi.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_data/cros_ec_commands.h>
+#include <linux/platform_data/cros_ec_proto.h>
+#include <linux/platform_device.h>
+#include <linux/usb/typec.h>
+
+#define DRV_NAME "cros-ec-typec"
+
+/* Platform-specific data for the Chrome OS EC Type C controller. */
+struct cros_typec_data {
+	struct device *dev;
+	struct cros_ec_device *ec;
+	int num_ports;
+	/* Array of ports, indexed by port number. */
+	struct typec_port *ports[EC_USB_PD_MAX_PORTS];
+	/* Initial capabilities for each port. */
+	struct typec_capability *caps[EC_USB_PD_MAX_PORTS];
+};
+
+static int cros_typec_parse_port_props(struct typec_capability *cap,
+				       struct fwnode_handle *fwnode,
+				       struct device *dev)
+{
+	const char *buf;
+	int ret;
+
+	memset(cap, 0, sizeof(*cap));
+	ret = fwnode_property_read_string(fwnode, "power-role", &buf);
+	if (ret) {
+		dev_err(dev, "power-role not found: %d\n", ret);
+		return ret;
+	}
+
+	ret = typec_find_port_power_role(buf);
+	if (ret < 0)
+		return ret;
+	cap->type = ret;
+
+	ret = fwnode_property_read_string(fwnode, "data-role", &buf);
+	if (ret) {
+		dev_err(dev, "data-role not found: %d\n", ret);
+		return ret;
+	}
+
+	ret = typec_find_port_data_role(buf);
+	if (ret < 0)
+		return ret;
+	cap->data = ret;
+
+	ret = fwnode_property_read_string(fwnode, "try-power-role", &buf);
+	if (ret) {
+		dev_err(dev, "try-power-role not found: %d\n", ret);
+		return ret;
+	}
+
+	ret = typec_find_power_role(buf);
+	if (ret < 0)
+		return ret;
+	cap->prefer_role = ret;
+
+	cap->fwnode = fwnode;
+
+	return 0;
+}
+
+static int cros_typec_init_ports(struct cros_typec_data *typec)
+{
+	struct device *dev = typec->dev;
+	struct typec_capability *cap;
+	struct fwnode_handle *fwnode;
+	const char *port_prop;
+	int ret;
+	int i;
+	int nports;
+	u32 port_num = 0;
+
+	nports = device_get_child_node_count(dev);
+	if (nports == 0) {
+		dev_err(dev, "No port entries found.\n");
+		return -ENODEV;
+	}
+
+	if (nports > typec->num_ports) {
+		dev_err(dev, "More ports listed than can be supported.\n");
+		return -EINVAL;
+	}
+
+	/* DT uses "reg" to specify port number. */
+	port_prop = dev->of_node ? "reg" : "port-number";
+	device_for_each_child_node(dev, fwnode) {
+		if (fwnode_property_read_u32(fwnode, port_prop, &port_num)) {
+			ret = -EINVAL;
+			dev_err(dev, "No port-number for port, aborting.\n");
+			goto unregister_ports;
+		}
+
+		if (port_num >= typec->num_ports) {
+			dev_err(dev, "Invalid port number.\n");
+			ret = -EINVAL;
+			goto unregister_ports;
+		}
+
+		dev_dbg(dev, "Registering port %d\n", port_num);
+
+		cap = devm_kzalloc(dev, sizeof(*cap), GFP_KERNEL);
+		if (!cap) {
+			ret = -ENOMEM;
+			goto unregister_ports;
+		}
+
+		typec->caps[port_num] = cap;
+
+		ret = cros_typec_parse_port_props(cap, fwnode, dev);
+		if (ret < 0)
+			goto unregister_ports;
+
+		typec->ports[port_num] = typec_register_port(dev, cap);
+		if (IS_ERR(typec->ports[port_num])) {
+			dev_err(dev, "Failed to register port %d\n", port_num);
+			ret = PTR_ERR(typec->ports[port_num]);
+			goto unregister_ports;
+		}
+	}
+
+	return 0;
+
+unregister_ports:
+	for (i = 0; i < typec->num_ports; i++)
+		typec_unregister_port(typec->ports[i]);
+	return ret;
+}
+
+static int cros_typec_ec_command(struct cros_typec_data *typec,
+				 unsigned int version,
+				 unsigned int command,
+				 void *outdata,
+				 unsigned int outsize,
+				 void *indata,
+				 unsigned int insize)
+{
+	struct cros_ec_command *msg;
+	int ret;
+
+	msg = kzalloc(sizeof(*msg) + max(outsize, insize), GFP_KERNEL);
+	if (!msg)
+		return -ENOMEM;
+
+	msg->version = version;
+	msg->command = command;
+	msg->outsize = outsize;
+	msg->insize = insize;
+
+	if (outsize)
+		memcpy(msg->data, outdata, outsize);
+
+	ret = cros_ec_cmd_xfer_status(typec->ec, msg);
+	if (ret >= 0 && insize)
+		memcpy(indata, msg->data, insize);
+
+	kfree(msg);
+	return ret;
+}
+
+#ifdef CONFIG_ACPI
+static const struct acpi_device_id cros_typec_acpi_id[] = {
+	{ "GOOG0014", 0 },
+	{}
+};
+MODULE_DEVICE_TABLE(acpi, cros_typec_acpi_id);
+#endif
+
+#ifdef CONFIG_OF
+static const struct of_device_id cros_typec_of_match[] = {
+	{ .compatible = "google,cros-ec-typec", },
+	{}
+};
+MODULE_DEVICE_TABLE(of, cros_typec_of_match);
+#endif
+
+static int cros_typec_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct cros_typec_data *typec;
+	struct ec_response_usb_pd_ports resp;
+	int ret;
+
+	typec = devm_kzalloc(dev, sizeof(*typec), GFP_KERNEL);
+	if (!typec)
+		return -ENOMEM;
+
+	typec->dev = dev;
+	typec->ec = dev_get_drvdata(pdev->dev.parent);
+	platform_set_drvdata(pdev, typec);
+
+	ret = cros_typec_ec_command(typec, 0, EC_CMD_USB_PD_PORTS, NULL, 0,
+				    &resp, sizeof(resp));
+	if (ret < 0)
+		return ret;
+
+	typec->num_ports = resp.num_ports;
+	if (typec->num_ports > EC_USB_PD_MAX_PORTS) {
+		dev_warn(typec->dev,
+			 "Too many ports reported: %d, limiting to max: %d\n",
+			 typec->num_ports, EC_USB_PD_MAX_PORTS);
+		typec->num_ports = EC_USB_PD_MAX_PORTS;
+	}
+
+	ret = cros_typec_init_ports(typec);
+	if (ret < 0)
+		return ret;
+
+	return 0;
+}
+
+static struct platform_driver cros_typec_driver = {
+	.driver	= {
+		.name = DRV_NAME,
+		.acpi_match_table = ACPI_PTR(cros_typec_acpi_id),
+		.of_match_table = of_match_ptr(cros_typec_of_match),
+	},
+	.probe = cros_typec_probe,
+};
+
+module_platform_driver(cros_typec_driver);
+
+MODULE_AUTHOR("Prashant Malani <pmalani@chromium.org>");
+MODULE_DESCRIPTION("Chrome OS EC Type C control");
+MODULE_LICENSE("GPL");
-- 
2.25.1.481.gfbce0eb801-goog

[PATCH v5 3/4] platform/chrome: typec: Get PD_CONTROL cmd version

[Prashant Malani]

Query the EC to determine the version number of the PD_CONTROL
command which is supported by the EC. Also store this value in the Type
C data struct since it will be used to determine how to parse the
response to queries for port information from the EC.

Signed-off-by: Prashant Malani <pmalani@chromium.org>
---

Changes in v5:
- No changes.

Changes in v4:
- No changes

Changes in v3:
- Moved if statement check in the end of probe() from this patch to a
  previous patch.

Changes in v2:
- No changes.

 drivers/platform/chrome/cros_ec_typec.c | 32 +++++++++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/drivers/platform/chrome/cros_ec_typec.c b/drivers/platform/chrome/cros_ec_typec.c
index 02e6d5cbbbf7a..9f692eb78b322 100644
--- a/drivers/platform/chrome/cros_ec_typec.c
+++ b/drivers/platform/chrome/cros_ec_typec.c
@@ -21,6 +21,7 @@ struct cros_typec_data {
 	struct device *dev;
 	struct cros_ec_device *ec;
 	int num_ports;
+	unsigned int cmd_ver;
 	/* Array of ports, indexed by port number. */
 	struct typec_port *ports[EC_USB_PD_MAX_PORTS];
 	/* Initial capabilities for each port. */
@@ -171,6 +172,31 @@ static int cros_typec_ec_command(struct cros_typec_data *typec,
 	return ret;
 }
 
+static int cros_typec_get_cmd_version(struct cros_typec_data *typec)
+{
+	struct ec_params_get_cmd_versions_v1 req_v1;
+	struct ec_response_get_cmd_versions resp;
+	int ret;
+
+	/* We're interested in the PD control command version. */
+	req_v1.cmd = EC_CMD_USB_PD_CONTROL;
+	ret = cros_typec_ec_command(typec, 1, EC_CMD_GET_CMD_VERSIONS,
+				    &req_v1, sizeof(req_v1), &resp,
+				    sizeof(resp));
+	if (ret < 0)
+		return ret;
+
+	if (resp.version_mask & EC_VER_MASK(1))
+		typec->cmd_ver = 1;
+	else
+		typec->cmd_ver = 0;
+
+	dev_dbg(typec->dev, "PD Control has version mask 0x%hhx\n",
+		typec->cmd_ver);
+
+	return 0;
+}
+
 #ifdef CONFIG_ACPI
 static const struct acpi_device_id cros_typec_acpi_id[] = {
 	{ "GOOG0014", 0 },
@@ -202,6 +228,12 @@ static int cros_typec_probe(struct platform_device *pdev)
 	typec->ec = dev_get_drvdata(pdev->dev.parent);
 	platform_set_drvdata(pdev, typec);
 
+	ret = cros_typec_get_cmd_version(typec);
+	if (ret < 0) {
+		dev_err(dev, "failed to get PD command version info\n");
+		return ret;
+	}
+
 	ret = cros_typec_ec_command(typec, 0, EC_CMD_USB_PD_PORTS, NULL, 0,
 				    &resp, sizeof(resp));
 	if (ret < 0)
-- 
2.25.1.481.gfbce0eb801-goog

[PATCH v5 4/4] platform/chrome: typec: Update port info from EC

[Prashant Malani]

After registering the ports at probe, get the current port information
from EC and update the Type C connector class ports accordingly.

Co-developed-by: Jon Flatley <jflat@chromium.org>
Signed-off-by: Prashant Malani <pmalani@chromium.org>
---

Changes in v5:
- No changes.

Changes in v4:
- No changes

Changes in v3:
- No changes.

Changes in v2:
- No changes.

 drivers/platform/chrome/cros_ec_typec.c | 89 ++++++++++++++++++++++++-
 1 file changed, 88 insertions(+), 1 deletion(-)

diff --git a/drivers/platform/chrome/cros_ec_typec.c b/drivers/platform/chrome/cros_ec_typec.c
index 9f692eb78b322..874269c070739 100644
--- a/drivers/platform/chrome/cros_ec_typec.c
+++ b/drivers/platform/chrome/cros_ec_typec.c
@@ -172,6 +172,81 @@ static int cros_typec_ec_command(struct cros_typec_data *typec,
 	return ret;
 }
 
+static void cros_typec_set_port_params_v0(struct cros_typec_data *typec,
+		int port_num, struct ec_response_usb_pd_control *resp)
+{
+	struct typec_port *port = typec->ports[port_num];
+	enum typec_orientation polarity;
+
+	if (!resp->enabled)
+		polarity = TYPEC_ORIENTATION_NONE;
+	else if (!resp->polarity)
+		polarity = TYPEC_ORIENTATION_NORMAL;
+	else
+		polarity = TYPEC_ORIENTATION_REVERSE;
+
+	typec_set_pwr_role(port, resp->role ? TYPEC_SOURCE : TYPEC_SINK);
+	typec_set_orientation(port, polarity);
+}
+
+static void cros_typec_set_port_params_v1(struct cros_typec_data *typec,
+		int port_num, struct ec_response_usb_pd_control_v1 *resp)
+{
+	struct typec_port *port = typec->ports[port_num];
+	enum typec_orientation polarity;
+
+	if (!(resp->enabled & PD_CTRL_RESP_ENABLED_CONNECTED))
+		polarity = TYPEC_ORIENTATION_NONE;
+	else if (!resp->polarity)
+		polarity = TYPEC_ORIENTATION_NORMAL;
+	else
+		polarity = TYPEC_ORIENTATION_REVERSE;
+	typec_set_orientation(port, polarity);
+	typec_set_data_role(port, resp->role & PD_CTRL_RESP_ROLE_DATA ?
+			TYPEC_HOST : TYPEC_DEVICE);
+	typec_set_pwr_role(port, resp->role & PD_CTRL_RESP_ROLE_POWER ?
+			TYPEC_SOURCE : TYPEC_SINK);
+	typec_set_vconn_role(port, resp->role & PD_CTRL_RESP_ROLE_VCONN ?
+			TYPEC_SOURCE : TYPEC_SINK);
+}
+
+static int cros_typec_port_update(struct cros_typec_data *typec, int port_num)
+{
+	struct ec_params_usb_pd_control req;
+	struct ec_response_usb_pd_control_v1 resp;
+	int ret;
+
+	if (port_num < 0 || port_num >= typec->num_ports) {
+		dev_err(typec->dev, "cannot get status for invalid port %d\n",
+			port_num);
+		return -EINVAL;
+	}
+
+	req.port = port_num;
+	req.role = USB_PD_CTRL_ROLE_NO_CHANGE;
+	req.mux = USB_PD_CTRL_MUX_NO_CHANGE;
+	req.swap = USB_PD_CTRL_SWAP_NONE;
+
+	ret = cros_typec_ec_command(typec, typec->cmd_ver,
+				    EC_CMD_USB_PD_CONTROL, &req, sizeof(req),
+				    &resp, sizeof(resp));
+	if (ret < 0)
+		return ret;
+
+	dev_dbg(typec->dev, "Enabled %d: 0x%hhx\n", port_num, resp.enabled);
+	dev_dbg(typec->dev, "Role %d: 0x%hhx\n", port_num, resp.role);
+	dev_dbg(typec->dev, "Polarity %d: 0x%hhx\n", port_num, resp.polarity);
+	dev_dbg(typec->dev, "State %d: %s\n", port_num, resp.state);
+
+	if (typec->cmd_ver == 1)
+		cros_typec_set_port_params_v1(typec, port_num, &resp);
+	else
+		cros_typec_set_port_params_v0(typec, port_num,
+			(struct ec_response_usb_pd_control *) &resp);
+
+	return 0;
+}
+
 static int cros_typec_get_cmd_version(struct cros_typec_data *typec)
 {
 	struct ec_params_get_cmd_versions_v1 req_v1;
@@ -218,7 +293,7 @@ static int cros_typec_probe(struct platform_device *pdev)
 	struct device *dev = &pdev->dev;
 	struct cros_typec_data *typec;
 	struct ec_response_usb_pd_ports resp;
-	int ret;
+	int ret, i;
 
 	typec = devm_kzalloc(dev, sizeof(*typec), GFP_KERNEL);
 	if (!typec)
@@ -251,7 +326,19 @@ static int cros_typec_probe(struct platform_device *pdev)
 	if (ret < 0)
 		return ret;
 
+	for (i = 0; i < typec->num_ports; i++) {
+		ret = cros_typec_port_update(typec, i);
+		if (ret < 0)
+			goto unregister_ports;
+	}
+
 	return 0;
+
+unregister_ports:
+	for (i = 0; i < typec->num_ports; i++)
+		if (typec->ports[i])
+			typec_unregister_port(typec->ports[i]);
+	return ret;
 }
 
 static struct platform_driver cros_typec_driver = {
-- 
2.25.1.481.gfbce0eb801-goog

Re: [PATCH v5 1/4] dt-bindings: Add cros-ec Type C port driver

[Enric Balletbo Serra]

Hi Prashant,

Missatge de Prashant Malani <pmalani@chromium.org> del dia dl., 16 de
març 2020 a les 10:02:
>
> Some Chrome OS devices with Embedded Controllers (EC) can read and
> modify Type C port state.
>
> Add an entry in the DT Bindings documentation that lists out the logical
> device and describes the relevant port information, to be used by the
> corresponding driver.
>
> Signed-off-by: Prashant Malani <pmalani@chromium.org>

After Rob review, it can go together with the other patches through
the chrome-platform tree. From my side:

Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>

> ---
>
> Changes in v5:
> - Updated License identifier.
> - Updated DT example to be a full example.
>
> Changes in v4:
> - Rebased on top of usb-connector.yaml, so the connector property now
>   directly references the usb-connector DT binding.
>
>  .../bindings/chrome/google,cros-ec-typec.yaml | 54 +++++++++++++++++++
>  1 file changed, 54 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/chrome/google,cros-ec-typec.yaml
>
> diff --git a/Documentation/devicetree/bindings/chrome/google,cros-ec-typec.yaml b/Documentation/devicetree/bindings/chrome/google,cros-ec-typec.yaml
> new file mode 100644
> index 0000000000000..6d7396ab8beec
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/chrome/google,cros-ec-typec.yaml
> @@ -0,0 +1,54 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/chrome/google,cros-ec-typec.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Google Chrome OS EC(Embedded Controller) Type C port driver.
> +
> +maintainers:
> +  - Benson Leung <bleung@chromium.org>
> +  - Prashant Malani <pmalani@chromium.org>
> +
> +description:
> +  Chrome OS devices have an Embedded Controller(EC) which has access to
> +  Type C port state. This node is intended to allow the host to read and
> +  control the Type C ports. The node for this device should be under a
> +  cros-ec node like google,cros-ec-spi.
> +
> +properties:
> +  compatible:
> +    const: google,cros-ec-typec
> +
> +  connector:
> +    $ref: /schemas/connector/usb-connector.yaml#
> +
> +required:
> +  - compatible
> +
> +examples:
> +  - |+
> +    spi0 {
> +      #address-cells = <1>;
> +      #size-cells = <0>;
> +
> +      cros_ec: ec@0 {
> +        compatible = "google,cros-ec-spi";
> +        reg = <0>;
> +
> +        typec {
> +          compatible = "google,cros-ec-typec";
> +
> +          #address-cells = <1>;
> +          #size-cells = <0>;
> +
> +          connector@0 {
> +            compatible = "usb-c-connector";
> +            reg = <0>;
> +            power-role = "dual";
> +            data-role = "dual";
> +            try-power-role = "source";
> +          };
> +        };
> +      };
> +    };
> --
> 2.25.1.481.gfbce0eb801-goog
>

Re: [PATCH v5 3/4] platform/chrome: typec: Get PD_CONTROL cmd version

[Prashant Malani]

My apologies, missed adding Heikki.

On Mon, Mar 16, 2020 at 2:01 AM Prashant Malani <pmalani@chromium.org> wrote:
>
> Query the EC to determine the version number of the PD_CONTROL
> command which is supported by the EC. Also store this value in the Type
> C data struct since it will be used to determine how to parse the
> response to queries for port information from the EC.
>
> Signed-off-by: Prashant Malani <pmalani@chromium.org>
> ---
>
> Changes in v5:
> - No changes.
>
> Changes in v4:
> - No changes
>
> Changes in v3:
> - Moved if statement check in the end of probe() from this patch to a
>   previous patch.
>
> Changes in v2:
> - No changes.
>
>  drivers/platform/chrome/cros_ec_typec.c | 32 +++++++++++++++++++++++++
>  1 file changed, 32 insertions(+)
>
> diff --git a/drivers/platform/chrome/cros_ec_typec.c b/drivers/platform/chrome/cros_ec_typec.c
> index 02e6d5cbbbf7a..9f692eb78b322 100644
> --- a/drivers/platform/chrome/cros_ec_typec.c
> +++ b/drivers/platform/chrome/cros_ec_typec.c
> @@ -21,6 +21,7 @@ struct cros_typec_data {
>         struct device *dev;
>         struct cros_ec_device *ec;
>         int num_ports;
> +       unsigned int cmd_ver;
>         /* Array of ports, indexed by port number. */
>         struct typec_port *ports[EC_USB_PD_MAX_PORTS];
>         /* Initial capabilities for each port. */
> @@ -171,6 +172,31 @@ static int cros_typec_ec_command(struct cros_typec_data *typec,
>         return ret;
>  }
>
> +static int cros_typec_get_cmd_version(struct cros_typec_data *typec)
> +{
> +       struct ec_params_get_cmd_versions_v1 req_v1;
> +       struct ec_response_get_cmd_versions resp;
> +       int ret;
> +
> +       /* We're interested in the PD control command version. */
> +       req_v1.cmd = EC_CMD_USB_PD_CONTROL;
> +       ret = cros_typec_ec_command(typec, 1, EC_CMD_GET_CMD_VERSIONS,
> +                                   &req_v1, sizeof(req_v1), &resp,
> +                                   sizeof(resp));
> +       if (ret < 0)
> +               return ret;
> +
> +       if (resp.version_mask & EC_VER_MASK(1))
> +               typec->cmd_ver = 1;
> +       else
> +               typec->cmd_ver = 0;
> +
> +       dev_dbg(typec->dev, "PD Control has version mask 0x%hhx\n",
> +               typec->cmd_ver);
> +
> +       return 0;
> +}
> +
>  #ifdef CONFIG_ACPI
>  static const struct acpi_device_id cros_typec_acpi_id[] = {
>         { "GOOG0014", 0 },
> @@ -202,6 +228,12 @@ static int cros_typec_probe(struct platform_device *pdev)
>         typec->ec = dev_get_drvdata(pdev->dev.parent);
>         platform_set_drvdata(pdev, typec);
>
> +       ret = cros_typec_get_cmd_version(typec);
> +       if (ret < 0) {
> +               dev_err(dev, "failed to get PD command version info\n");
> +               return ret;
> +       }
> +
>         ret = cros_typec_ec_command(typec, 0, EC_CMD_USB_PD_PORTS, NULL, 0,
>                                     &resp, sizeof(resp));
>         if (ret < 0)
> --
> 2.25.1.481.gfbce0eb801-goog
>

Re: [PATCH v5 4/4] platform/chrome: typec: Update port info from EC

[Prashant Malani]

Adding Heikki (missed in the initial email)

On Mon, Mar 16, 2020 at 2:01 AM Prashant Malani <pmalani@chromium.org> wrote:
>
> After registering the ports at probe, get the current port information
> from EC and update the Type C connector class ports accordingly.
>
> Co-developed-by: Jon Flatley <jflat@chromium.org>
> Signed-off-by: Prashant Malani <pmalani@chromium.org>
> ---
>
> Changes in v5:
> - No changes.
>
> Changes in v4:
> - No changes
>
> Changes in v3:
> - No changes.
>
> Changes in v2:
> - No changes.
>
>  drivers/platform/chrome/cros_ec_typec.c | 89 ++++++++++++++++++++++++-
>  1 file changed, 88 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/platform/chrome/cros_ec_typec.c b/drivers/platform/chrome/cros_ec_typec.c
> index 9f692eb78b322..874269c070739 100644
> --- a/drivers/platform/chrome/cros_ec_typec.c
> +++ b/drivers/platform/chrome/cros_ec_typec.c
> @@ -172,6 +172,81 @@ static int cros_typec_ec_command(struct cros_typec_data *typec,
>         return ret;
>  }
>
> +static void cros_typec_set_port_params_v0(struct cros_typec_data *typec,
> +               int port_num, struct ec_response_usb_pd_control *resp)
> +{
> +       struct typec_port *port = typec->ports[port_num];
> +       enum typec_orientation polarity;
> +
> +       if (!resp->enabled)
> +               polarity = TYPEC_ORIENTATION_NONE;
> +       else if (!resp->polarity)
> +               polarity = TYPEC_ORIENTATION_NORMAL;
> +       else
> +               polarity = TYPEC_ORIENTATION_REVERSE;
> +
> +       typec_set_pwr_role(port, resp->role ? TYPEC_SOURCE : TYPEC_SINK);
> +       typec_set_orientation(port, polarity);
> +}
> +
> +static void cros_typec_set_port_params_v1(struct cros_typec_data *typec,
> +               int port_num, struct ec_response_usb_pd_control_v1 *resp)
> +{
> +       struct typec_port *port = typec->ports[port_num];
> +       enum typec_orientation polarity;
> +
> +       if (!(resp->enabled & PD_CTRL_RESP_ENABLED_CONNECTED))
> +               polarity = TYPEC_ORIENTATION_NONE;
> +       else if (!resp->polarity)
> +               polarity = TYPEC_ORIENTATION_NORMAL;
> +       else
> +               polarity = TYPEC_ORIENTATION_REVERSE;
> +       typec_set_orientation(port, polarity);
> +       typec_set_data_role(port, resp->role & PD_CTRL_RESP_ROLE_DATA ?
> +                       TYPEC_HOST : TYPEC_DEVICE);
> +       typec_set_pwr_role(port, resp->role & PD_CTRL_RESP_ROLE_POWER ?
> +                       TYPEC_SOURCE : TYPEC_SINK);
> +       typec_set_vconn_role(port, resp->role & PD_CTRL_RESP_ROLE_VCONN ?
> +                       TYPEC_SOURCE : TYPEC_SINK);
> +}
> +
> +static int cros_typec_port_update(struct cros_typec_data *typec, int port_num)
> +{
> +       struct ec_params_usb_pd_control req;
> +       struct ec_response_usb_pd_control_v1 resp;
> +       int ret;
> +
> +       if (port_num < 0 || port_num >= typec->num_ports) {
> +               dev_err(typec->dev, "cannot get status for invalid port %d\n",
> +                       port_num);
> +               return -EINVAL;
> +       }
> +
> +       req.port = port_num;
> +       req.role = USB_PD_CTRL_ROLE_NO_CHANGE;
> +       req.mux = USB_PD_CTRL_MUX_NO_CHANGE;
> +       req.swap = USB_PD_CTRL_SWAP_NONE;
> +
> +       ret = cros_typec_ec_command(typec, typec->cmd_ver,
> +                                   EC_CMD_USB_PD_CONTROL, &req, sizeof(req),
> +                                   &resp, sizeof(resp));
> +       if (ret < 0)
> +               return ret;
> +
> +       dev_dbg(typec->dev, "Enabled %d: 0x%hhx\n", port_num, resp.enabled);
> +       dev_dbg(typec->dev, "Role %d: 0x%hhx\n", port_num, resp.role);
> +       dev_dbg(typec->dev, "Polarity %d: 0x%hhx\n", port_num, resp.polarity);
> +       dev_dbg(typec->dev, "State %d: %s\n", port_num, resp.state);
> +
> +       if (typec->cmd_ver == 1)
> +               cros_typec_set_port_params_v1(typec, port_num, &resp);
> +       else
> +               cros_typec_set_port_params_v0(typec, port_num,
> +                       (struct ec_response_usb_pd_control *) &resp);
> +
> +       return 0;
> +}
> +
>  static int cros_typec_get_cmd_version(struct cros_typec_data *typec)
>  {
>         struct ec_params_get_cmd_versions_v1 req_v1;
> @@ -218,7 +293,7 @@ static int cros_typec_probe(struct platform_device *pdev)
>         struct device *dev = &pdev->dev;
>         struct cros_typec_data *typec;
>         struct ec_response_usb_pd_ports resp;
> -       int ret;
> +       int ret, i;
>
>         typec = devm_kzalloc(dev, sizeof(*typec), GFP_KERNEL);
>         if (!typec)
> @@ -251,7 +326,19 @@ static int cros_typec_probe(struct platform_device *pdev)
>         if (ret < 0)
>                 return ret;
>
> +       for (i = 0; i < typec->num_ports; i++) {
> +               ret = cros_typec_port_update(typec, i);
> +               if (ret < 0)
> +                       goto unregister_ports;
> +       }
> +
>         return 0;
> +
> +unregister_ports:
> +       for (i = 0; i < typec->num_ports; i++)
> +               if (typec->ports[i])
> +                       typec_unregister_port(typec->ports[i]);
> +       return ret;
>  }
>
>  static struct platform_driver cros_typec_driver = {
> --
> 2.25.1.481.gfbce0eb801-goog
>

Re: [PATCH v5 3/4] platform/chrome: typec: Get PD_CONTROL cmd version

[Heikki Krogerus]

On Mon, Mar 16, 2020 at 02:00:19AM -0700, Prashant Malani wrote:
> Query the EC to determine the version number of the PD_CONTROL
> command which is supported by the EC. Also store this value in the Type
> C data struct since it will be used to determine how to parse the
> response to queries for port information from the EC.
> 
> Signed-off-by: Prashant Malani <pmalani@chromium.org>

In case there is v6, please consider merging this into patch 4/4. I
don't think this needs separate patch. Otherwise, FWIW:

Reviewed-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>

> ---
> 
> Changes in v5:
> - No changes.
> 
> Changes in v4:
> - No changes
> 
> Changes in v3:
> - Moved if statement check in the end of probe() from this patch to a
>   previous patch.
> 
> Changes in v2:
> - No changes.
> 
>  drivers/platform/chrome/cros_ec_typec.c | 32 +++++++++++++++++++++++++
>  1 file changed, 32 insertions(+)
> 
> diff --git a/drivers/platform/chrome/cros_ec_typec.c b/drivers/platform/chrome/cros_ec_typec.c
> index 02e6d5cbbbf7a..9f692eb78b322 100644
> --- a/drivers/platform/chrome/cros_ec_typec.c
> +++ b/drivers/platform/chrome/cros_ec_typec.c
> @@ -21,6 +21,7 @@ struct cros_typec_data {
>  	struct device *dev;
>  	struct cros_ec_device *ec;
>  	int num_ports;
> +	unsigned int cmd_ver;
>  	/* Array of ports, indexed by port number. */
>  	struct typec_port *ports[EC_USB_PD_MAX_PORTS];
>  	/* Initial capabilities for each port. */
> @@ -171,6 +172,31 @@ static int cros_typec_ec_command(struct cros_typec_data *typec,
>  	return ret;
>  }
>  
> +static int cros_typec_get_cmd_version(struct cros_typec_data *typec)
> +{
> +	struct ec_params_get_cmd_versions_v1 req_v1;
> +	struct ec_response_get_cmd_versions resp;
> +	int ret;
> +
> +	/* We're interested in the PD control command version. */
> +	req_v1.cmd = EC_CMD_USB_PD_CONTROL;
> +	ret = cros_typec_ec_command(typec, 1, EC_CMD_GET_CMD_VERSIONS,
> +				    &req_v1, sizeof(req_v1), &resp,
> +				    sizeof(resp));
> +	if (ret < 0)
> +		return ret;
> +
> +	if (resp.version_mask & EC_VER_MASK(1))
> +		typec->cmd_ver = 1;
> +	else
> +		typec->cmd_ver = 0;
> +
> +	dev_dbg(typec->dev, "PD Control has version mask 0x%hhx\n",
> +		typec->cmd_ver);
> +
> +	return 0;
> +}
> +
>  #ifdef CONFIG_ACPI
>  static const struct acpi_device_id cros_typec_acpi_id[] = {
>  	{ "GOOG0014", 0 },
> @@ -202,6 +228,12 @@ static int cros_typec_probe(struct platform_device *pdev)
>  	typec->ec = dev_get_drvdata(pdev->dev.parent);
>  	platform_set_drvdata(pdev, typec);
>  
> +	ret = cros_typec_get_cmd_version(typec);
> +	if (ret < 0) {
> +		dev_err(dev, "failed to get PD command version info\n");
> +		return ret;
> +	}
> +
>  	ret = cros_typec_ec_command(typec, 0, EC_CMD_USB_PD_PORTS, NULL, 0,
>  				    &resp, sizeof(resp));
>  	if (ret < 0)
> -- 
> 2.25.1.481.gfbce0eb801-goog

thanks,

-- 
heikki

Re: [PATCH v5 4/4] platform/chrome: typec: Update port info from EC

[Heikki Krogerus]

On Mon, Mar 16, 2020 at 02:00:21AM -0700, Prashant Malani wrote:
> After registering the ports at probe, get the current port information
> from EC and update the Type C connector class ports accordingly.
> 
> Co-developed-by: Jon Flatley <jflat@chromium.org>
> Signed-off-by: Prashant Malani <pmalani@chromium.org>

Reviewed-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>

> ---
> 
> Changes in v5:
> - No changes.
> 
> Changes in v4:
> - No changes
> 
> Changes in v3:
> - No changes.
> 
> Changes in v2:
> - No changes.
> 
>  drivers/platform/chrome/cros_ec_typec.c | 89 ++++++++++++++++++++++++-
>  1 file changed, 88 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/platform/chrome/cros_ec_typec.c b/drivers/platform/chrome/cros_ec_typec.c
> index 9f692eb78b322..874269c070739 100644
> --- a/drivers/platform/chrome/cros_ec_typec.c
> +++ b/drivers/platform/chrome/cros_ec_typec.c
> @@ -172,6 +172,81 @@ static int cros_typec_ec_command(struct cros_typec_data *typec,
>  	return ret;
>  }
>  
> +static void cros_typec_set_port_params_v0(struct cros_typec_data *typec,
> +		int port_num, struct ec_response_usb_pd_control *resp)
> +{
> +	struct typec_port *port = typec->ports[port_num];
> +	enum typec_orientation polarity;
> +
> +	if (!resp->enabled)
> +		polarity = TYPEC_ORIENTATION_NONE;
> +	else if (!resp->polarity)
> +		polarity = TYPEC_ORIENTATION_NORMAL;
> +	else
> +		polarity = TYPEC_ORIENTATION_REVERSE;
> +
> +	typec_set_pwr_role(port, resp->role ? TYPEC_SOURCE : TYPEC_SINK);
> +	typec_set_orientation(port, polarity);
> +}
> +
> +static void cros_typec_set_port_params_v1(struct cros_typec_data *typec,
> +		int port_num, struct ec_response_usb_pd_control_v1 *resp)
> +{
> +	struct typec_port *port = typec->ports[port_num];
> +	enum typec_orientation polarity;
> +
> +	if (!(resp->enabled & PD_CTRL_RESP_ENABLED_CONNECTED))
> +		polarity = TYPEC_ORIENTATION_NONE;
> +	else if (!resp->polarity)
> +		polarity = TYPEC_ORIENTATION_NORMAL;
> +	else
> +		polarity = TYPEC_ORIENTATION_REVERSE;
> +	typec_set_orientation(port, polarity);
> +	typec_set_data_role(port, resp->role & PD_CTRL_RESP_ROLE_DATA ?
> +			TYPEC_HOST : TYPEC_DEVICE);
> +	typec_set_pwr_role(port, resp->role & PD_CTRL_RESP_ROLE_POWER ?
> +			TYPEC_SOURCE : TYPEC_SINK);
> +	typec_set_vconn_role(port, resp->role & PD_CTRL_RESP_ROLE_VCONN ?
> +			TYPEC_SOURCE : TYPEC_SINK);
> +}
> +
> +static int cros_typec_port_update(struct cros_typec_data *typec, int port_num)
> +{
> +	struct ec_params_usb_pd_control req;
> +	struct ec_response_usb_pd_control_v1 resp;
> +	int ret;
> +
> +	if (port_num < 0 || port_num >= typec->num_ports) {
> +		dev_err(typec->dev, "cannot get status for invalid port %d\n",
> +			port_num);
> +		return -EINVAL;
> +	}
> +
> +	req.port = port_num;
> +	req.role = USB_PD_CTRL_ROLE_NO_CHANGE;
> +	req.mux = USB_PD_CTRL_MUX_NO_CHANGE;
> +	req.swap = USB_PD_CTRL_SWAP_NONE;
> +
> +	ret = cros_typec_ec_command(typec, typec->cmd_ver,
> +				    EC_CMD_USB_PD_CONTROL, &req, sizeof(req),
> +				    &resp, sizeof(resp));
> +	if (ret < 0)
> +		return ret;
> +
> +	dev_dbg(typec->dev, "Enabled %d: 0x%hhx\n", port_num, resp.enabled);
> +	dev_dbg(typec->dev, "Role %d: 0x%hhx\n", port_num, resp.role);
> +	dev_dbg(typec->dev, "Polarity %d: 0x%hhx\n", port_num, resp.polarity);
> +	dev_dbg(typec->dev, "State %d: %s\n", port_num, resp.state);
> +
> +	if (typec->cmd_ver == 1)
> +		cros_typec_set_port_params_v1(typec, port_num, &resp);
> +	else
> +		cros_typec_set_port_params_v0(typec, port_num,
> +			(struct ec_response_usb_pd_control *) &resp);
> +
> +	return 0;
> +}
> +
>  static int cros_typec_get_cmd_version(struct cros_typec_data *typec)
>  {
>  	struct ec_params_get_cmd_versions_v1 req_v1;
> @@ -218,7 +293,7 @@ static int cros_typec_probe(struct platform_device *pdev)
>  	struct device *dev = &pdev->dev;
>  	struct cros_typec_data *typec;
>  	struct ec_response_usb_pd_ports resp;
> -	int ret;
> +	int ret, i;
>  
>  	typec = devm_kzalloc(dev, sizeof(*typec), GFP_KERNEL);
>  	if (!typec)
> @@ -251,7 +326,19 @@ static int cros_typec_probe(struct platform_device *pdev)
>  	if (ret < 0)
>  		return ret;
>  
> +	for (i = 0; i < typec->num_ports; i++) {
> +		ret = cros_typec_port_update(typec, i);
> +		if (ret < 0)
> +			goto unregister_ports;
> +	}
> +
>  	return 0;
> +
> +unregister_ports:
> +	for (i = 0; i < typec->num_ports; i++)
> +		if (typec->ports[i])
> +			typec_unregister_port(typec->ports[i]);
> +	return ret;
>  }
>  
>  static struct platform_driver cros_typec_driver = {
> -- 
> 2.25.1.481.gfbce0eb801-goog

thanks,

-- 
heikki

Re: [PATCH v5 2/4] platform/chrome: Add Type C connector class driver

[Benson Leung]

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Hi Prashant,

On Mon, Mar 16, 2020 at 02:00:17AM -0700, Prashant Malani wrote:
> Add a driver to implement the Type C connector class for Chrome OS
> devices with ECs (Embedded Controllers).
> 
> The driver relies on firmware device specifications for various port
> attributes. On ACPI platforms, this is specified using the logical
> device with HID GOOG0014. On DT platforms, this is specified using the
> DT node with compatible string "google,cros-ec-typec".
> 
> The driver reads the device FW node and uses the port attributes to
> register the typec ports with the Type C connector class framework, but
> doesn't do much else.
> 
> Subsequent patches will add more functionality to the driver, including
> obtaining current port information (polarity, vconn role, current power
> role etc.) after querying the EC.
> 
> Signed-off-by: Prashant Malani <pmalani@chromium.org>
> Reviewed-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>

Thanks for posting this. For my bit:
Co-developed-by: Benson Leung <bleung@chromium.org>

> ---
> 
> Changes in v5:
> - Added Reviewed-by tag which was missed in earlier version.
> 
> Changes in v4:
> - Added Reviewed-by tag from previous review cycle
> - Added code to store port caps within the Cros EC type C data structure
> - Added code to use reg to get the port-number in DT platforms.
> 
> Changes in v3:
> - Fixed minor spacing nits, and moved a modification to probe() if check
>   from later patch to here instead.
> 
> Changes in v2:
> - Updated Kconfig to default to MFD_CROS_EC_DEV.
> - Fixed code comments.
> - Moved get_num_ports() code into probe().
> - Added module author.
> 
>  drivers/platform/chrome/Kconfig         |  11 ++
>  drivers/platform/chrome/Makefile        |   1 +
>  drivers/platform/chrome/cros_ec_typec.c | 238 ++++++++++++++++++++++++
>  3 files changed, 250 insertions(+)
>  create mode 100644 drivers/platform/chrome/cros_ec_typec.c
> 
> diff --git a/drivers/platform/chrome/Kconfig b/drivers/platform/chrome/Kconfig
> index 5f57282a28da0..2320a4f0d9301 100644
> --- a/drivers/platform/chrome/Kconfig
> +++ b/drivers/platform/chrome/Kconfig
> @@ -214,6 +214,17 @@ config CROS_EC_SYSFS
>  	  To compile this driver as a module, choose M here: the
>  	  module will be called cros_ec_sysfs.
>  
> +config CROS_EC_TYPEC
> +	tristate "ChromeOS EC Type-C Connector Control"
> +	depends on MFD_CROS_EC_DEV && TYPEC
> +	default MFD_CROS_EC_DEV
> +	help
> +	  If you say Y here, you get support for accessing Type C connector
> +	  information from the Chrome OS EC.
> +
> +	  To compile this driver as a module, choose M here: the module will be
> +	  called cros_ec_typec.
> +
>  config CROS_USBPD_LOGGER
>  	tristate "Logging driver for USB PD charger"
>  	depends on CHARGER_CROS_USBPD
> diff --git a/drivers/platform/chrome/Makefile b/drivers/platform/chrome/Makefile
> index aacd5920d8a18..caf2a9cdb5e6d 100644
> --- a/drivers/platform/chrome/Makefile
> +++ b/drivers/platform/chrome/Makefile
> @@ -12,6 +12,7 @@ obj-$(CONFIG_CROS_EC_ISHTP)		+= cros_ec_ishtp.o
>  obj-$(CONFIG_CROS_EC_RPMSG)		+= cros_ec_rpmsg.o
>  obj-$(CONFIG_CROS_EC_SPI)		+= cros_ec_spi.o
>  cros_ec_lpcs-objs			:= cros_ec_lpc.o cros_ec_lpc_mec.o
> +obj-$(CONFIG_CROS_EC_TYPEC)		+= cros_ec_typec.o
>  obj-$(CONFIG_CROS_EC_LPC)		+= cros_ec_lpcs.o
>  obj-$(CONFIG_CROS_EC_PROTO)		+= cros_ec_proto.o cros_ec_trace.o
>  obj-$(CONFIG_CROS_KBD_LED_BACKLIGHT)	+= cros_kbd_led_backlight.o
> diff --git a/drivers/platform/chrome/cros_ec_typec.c b/drivers/platform/chrome/cros_ec_typec.c
> new file mode 100644
> index 0000000000000..02e6d5cbbbf7a
> --- /dev/null
> +++ b/drivers/platform/chrome/cros_ec_typec.c
> @@ -0,0 +1,238 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Copyright 2020 Google LLC
> + *
> + * This driver provides the ability to view and manage Type C ports through the
> + * Chrome OS EC.
> + */
> +
> +#include <linux/acpi.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/platform_data/cros_ec_commands.h>
> +#include <linux/platform_data/cros_ec_proto.h>
> +#include <linux/platform_device.h>
> +#include <linux/usb/typec.h>
> +
> +#define DRV_NAME "cros-ec-typec"
> +
> +/* Platform-specific data for the Chrome OS EC Type C controller. */
> +struct cros_typec_data {
> +	struct device *dev;
> +	struct cros_ec_device *ec;
> +	int num_ports;
> +	/* Array of ports, indexed by port number. */
> +	struct typec_port *ports[EC_USB_PD_MAX_PORTS];
> +	/* Initial capabilities for each port. */
> +	struct typec_capability *caps[EC_USB_PD_MAX_PORTS];
> +};
> +
> +static int cros_typec_parse_port_props(struct typec_capability *cap,
> +				       struct fwnode_handle *fwnode,
> +				       struct device *dev)
> +{
> +	const char *buf;
> +	int ret;
> +
> +	memset(cap, 0, sizeof(*cap));
> +	ret = fwnode_property_read_string(fwnode, "power-role", &buf);
> +	if (ret) {
> +		dev_err(dev, "power-role not found: %d\n", ret);
> +		return ret;
> +	}
> +
> +	ret = typec_find_port_power_role(buf);
> +	if (ret < 0)
> +		return ret;
> +	cap->type = ret;
> +
> +	ret = fwnode_property_read_string(fwnode, "data-role", &buf);
> +	if (ret) {
> +		dev_err(dev, "data-role not found: %d\n", ret);
> +		return ret;
> +	}
> +
> +	ret = typec_find_port_data_role(buf);
> +	if (ret < 0)
> +		return ret;
> +	cap->data = ret;
> +
> +	ret = fwnode_property_read_string(fwnode, "try-power-role", &buf);
> +	if (ret) {
> +		dev_err(dev, "try-power-role not found: %d\n", ret);
> +		return ret;
> +	}
> +
> +	ret = typec_find_power_role(buf);
> +	if (ret < 0)
> +		return ret;
> +	cap->prefer_role = ret;
> +
> +	cap->fwnode = fwnode;
> +
> +	return 0;
> +}
> +
> +static int cros_typec_init_ports(struct cros_typec_data *typec)
> +{
> +	struct device *dev = typec->dev;
> +	struct typec_capability *cap;
> +	struct fwnode_handle *fwnode;
> +	const char *port_prop;
> +	int ret;
> +	int i;
> +	int nports;
> +	u32 port_num = 0;
> +
> +	nports = device_get_child_node_count(dev);
> +	if (nports == 0) {
> +		dev_err(dev, "No port entries found.\n");
> +		return -ENODEV;
> +	}
> +
> +	if (nports > typec->num_ports) {
> +		dev_err(dev, "More ports listed than can be supported.\n");
> +		return -EINVAL;
> +	}
> +
> +	/* DT uses "reg" to specify port number. */
> +	port_prop = dev->of_node ? "reg" : "port-number";
> +	device_for_each_child_node(dev, fwnode) {
> +		if (fwnode_property_read_u32(fwnode, port_prop, &port_num)) {
> +			ret = -EINVAL;
> +			dev_err(dev, "No port-number for port, aborting.\n");
> +			goto unregister_ports;
> +		}
> +
> +		if (port_num >= typec->num_ports) {
> +			dev_err(dev, "Invalid port number.\n");
> +			ret = -EINVAL;
> +			goto unregister_ports;
> +		}
> +
> +		dev_dbg(dev, "Registering port %d\n", port_num);
> +
> +		cap = devm_kzalloc(dev, sizeof(*cap), GFP_KERNEL);
> +		if (!cap) {
> +			ret = -ENOMEM;
> +			goto unregister_ports;
> +		}
> +
> +		typec->caps[port_num] = cap;
> +
> +		ret = cros_typec_parse_port_props(cap, fwnode, dev);
> +		if (ret < 0)
> +			goto unregister_ports;
> +
> +		typec->ports[port_num] = typec_register_port(dev, cap);
> +		if (IS_ERR(typec->ports[port_num])) {
> +			dev_err(dev, "Failed to register port %d\n", port_num);
> +			ret = PTR_ERR(typec->ports[port_num]);
> +			goto unregister_ports;
> +		}
> +	}
> +
> +	return 0;
> +
> +unregister_ports:
> +	for (i = 0; i < typec->num_ports; i++)
> +		typec_unregister_port(typec->ports[i]);
> +	return ret;
> +}
> +
> +static int cros_typec_ec_command(struct cros_typec_data *typec,
> +				 unsigned int version,
> +				 unsigned int command,
> +				 void *outdata,
> +				 unsigned int outsize,
> +				 void *indata,
> +				 unsigned int insize)
> +{
> +	struct cros_ec_command *msg;
> +	int ret;
> +
> +	msg = kzalloc(sizeof(*msg) + max(outsize, insize), GFP_KERNEL);
> +	if (!msg)
> +		return -ENOMEM;
> +
> +	msg->version = version;
> +	msg->command = command;
> +	msg->outsize = outsize;
> +	msg->insize = insize;
> +
> +	if (outsize)
> +		memcpy(msg->data, outdata, outsize);
> +
> +	ret = cros_ec_cmd_xfer_status(typec->ec, msg);
> +	if (ret >= 0 && insize)
> +		memcpy(indata, msg->data, insize);
> +
> +	kfree(msg);
> +	return ret;
> +}
> +
> +#ifdef CONFIG_ACPI
> +static const struct acpi_device_id cros_typec_acpi_id[] = {
> +	{ "GOOG0014", 0 },
> +	{}
> +};
> +MODULE_DEVICE_TABLE(acpi, cros_typec_acpi_id);
> +#endif
> +
> +#ifdef CONFIG_OF
> +static const struct of_device_id cros_typec_of_match[] = {
> +	{ .compatible = "google,cros-ec-typec", },
> +	{}
> +};
> +MODULE_DEVICE_TABLE(of, cros_typec_of_match);
> +#endif
> +
> +static int cros_typec_probe(struct platform_device *pdev)
> +{
> +	struct device *dev = &pdev->dev;
> +	struct cros_typec_data *typec;
> +	struct ec_response_usb_pd_ports resp;
> +	int ret;
> +
> +	typec = devm_kzalloc(dev, sizeof(*typec), GFP_KERNEL);
> +	if (!typec)
> +		return -ENOMEM;
> +
> +	typec->dev = dev;
> +	typec->ec = dev_get_drvdata(pdev->dev.parent);
> +	platform_set_drvdata(pdev, typec);
> +
> +	ret = cros_typec_ec_command(typec, 0, EC_CMD_USB_PD_PORTS, NULL, 0,
> +				    &resp, sizeof(resp));
> +	if (ret < 0)
> +		return ret;
> +
> +	typec->num_ports = resp.num_ports;
> +	if (typec->num_ports > EC_USB_PD_MAX_PORTS) {
> +		dev_warn(typec->dev,
> +			 "Too many ports reported: %d, limiting to max: %d\n",
> +			 typec->num_ports, EC_USB_PD_MAX_PORTS);
> +		typec->num_ports = EC_USB_PD_MAX_PORTS;
> +	}
> +
> +	ret = cros_typec_init_ports(typec);
> +	if (ret < 0)
> +		return ret;
> +
> +	return 0;
> +}
> +
> +static struct platform_driver cros_typec_driver = {
> +	.driver	= {
> +		.name = DRV_NAME,
> +		.acpi_match_table = ACPI_PTR(cros_typec_acpi_id),
> +		.of_match_table = of_match_ptr(cros_typec_of_match),
> +	},
> +	.probe = cros_typec_probe,
> +};
> +
> +module_platform_driver(cros_typec_driver);
> +
> +MODULE_AUTHOR("Prashant Malani <pmalani@chromium.org>");
> +MODULE_DESCRIPTION("Chrome OS EC Type C control");
> +MODULE_LICENSE("GPL");
> -- 
> 2.25.1.481.gfbce0eb801-goog
> 

-- 
Benson Leung
Staff Software Engineer
Chrome OS Kernel
Google Inc.
bleung@google.com
Chromium OS Project
bleung@chromium.org

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Re: [PATCH v5 1/4] dt-bindings: Add cros-ec Type C port driver

[Rob Herring]

On Mon, Mar 16, 2020 at 04:14:13PM +0100, Enric Balletbo Serra wrote:
> Hi Prashant,
> 
> Missatge de Prashant Malani <pmalani@chromium.org> del dia dl., 16 de
> març 2020 a les 10:02:
> >
> > Some Chrome OS devices with Embedded Controllers (EC) can read and
> > modify Type C port state.
> >
> > Add an entry in the DT Bindings documentation that lists out the logical
> > device and describes the relevant port information, to be used by the
> > corresponding driver.
> >
> > Signed-off-by: Prashant Malani <pmalani@chromium.org>
> 
> After Rob review, it can go together with the other patches through
> the chrome-platform tree. From my side:

LGTM, but it is dependent on usb-connector.yaml which I picked up. 
Either I can take this patch or you pull my dt/next branch in.

Rob

Re: [PATCH v5 1/4] dt-bindings: Add cros-ec Type C port driver

[Enric Balletbo Serra]

Hi Rob,

Missatge de Rob Herring <robh@kernel.org> del dia dv., 20 de març 2020
a les 23:35:
>
> On Mon, Mar 16, 2020 at 04:14:13PM +0100, Enric Balletbo Serra wrote:
> > Hi Prashant,
> >
> > Missatge de Prashant Malani <pmalani@chromium.org> del dia dl., 16 de
> > març 2020 a les 10:02:
> > >
> > > Some Chrome OS devices with Embedded Controllers (EC) can read and
> > > modify Type C port state.
> > >
> > > Add an entry in the DT Bindings documentation that lists out the logical
> > > device and describes the relevant port information, to be used by the
> > > corresponding driver.
> > >
> > > Signed-off-by: Prashant Malani <pmalani@chromium.org>
> >
> > After Rob review, it can go together with the other patches through
> > the chrome-platform tree. From my side:
>
> LGTM, but it is dependent on usb-connector.yaml which I picked up.
> Either I can take this patch or you pull my dt/next branch in.
>

I'm fine with you picking this patch in your branch.

Thanks,
 Enric

> Rob

Re: [PATCH v5 2/4] platform/chrome: Add Type C connector class driver

[Enric Balletbo i Serra]

Hi Prashant and Benson,

On 18/3/20 18:43, Benson Leung wrote:
> Hi Prashant,
> 
> On Mon, Mar 16, 2020 at 02:00:17AM -0700, Prashant Malani wrote:
>> Add a driver to implement the Type C connector class for Chrome OS
>> devices with ECs (Embedded Controllers).
>>
>> The driver relies on firmware device specifications for various port
>> attributes. On ACPI platforms, this is specified using the logical
>> device with HID GOOG0014. On DT platforms, this is specified using the
>> DT node with compatible string "google,cros-ec-typec".
>>
>> The driver reads the device FW node and uses the port attributes to
>> register the typec ports with the Type C connector class framework, but
>> doesn't do much else.
>>
>> Subsequent patches will add more functionality to the driver, including
>> obtaining current port information (polarity, vconn role, current power
>> role etc.) after querying the EC.
>>
>> Signed-off-by: Prashant Malani <pmalani@chromium.org>
>> Reviewed-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
> 
> Thanks for posting this. For my bit:
> Co-developed-by: Benson Leung <bleung@chromium.org>
> 

Squashed 3 and 4 and queued together with 2 for 5.7. Patch 1 will go through the
Rob's tree.

Thanks,
 Enric

>> ---
>>
>> Changes in v5:
>> - Added Reviewed-by tag which was missed in earlier version.
>>
>> Changes in v4:
>> - Added Reviewed-by tag from previous review cycle
>> - Added code to store port caps within the Cros EC type C data structure
>> - Added code to use reg to get the port-number in DT platforms.
>>
>> Changes in v3:
>> - Fixed minor spacing nits, and moved a modification to probe() if check
>>   from later patch to here instead.
>>
>> Changes in v2:
>> - Updated Kconfig to default to MFD_CROS_EC_DEV.
>> - Fixed code comments.
>> - Moved get_num_ports() code into probe().
>> - Added module author.
>>
>>  drivers/platform/chrome/Kconfig         |  11 ++
>>  drivers/platform/chrome/Makefile        |   1 +
>>  drivers/platform/chrome/cros_ec_typec.c | 238 ++++++++++++++++++++++++
>>  3 files changed, 250 insertions(+)
>>  create mode 100644 drivers/platform/chrome/cros_ec_typec.c
>>
>> diff --git a/drivers/platform/chrome/Kconfig b/drivers/platform/chrome/Kconfig
>> index 5f57282a28da0..2320a4f0d9301 100644
>> --- a/drivers/platform/chrome/Kconfig
>> +++ b/drivers/platform/chrome/Kconfig
>> @@ -214,6 +214,17 @@ config CROS_EC_SYSFS
>>  	  To compile this driver as a module, choose M here: the
>>  	  module will be called cros_ec_sysfs.
>>  
>> +config CROS_EC_TYPEC
>> +	tristate "ChromeOS EC Type-C Connector Control"
>> +	depends on MFD_CROS_EC_DEV && TYPEC
>> +	default MFD_CROS_EC_DEV
>> +	help
>> +	  If you say Y here, you get support for accessing Type C connector
>> +	  information from the Chrome OS EC.
>> +
>> +	  To compile this driver as a module, choose M here: the module will be
>> +	  called cros_ec_typec.
>> +
>>  config CROS_USBPD_LOGGER
>>  	tristate "Logging driver for USB PD charger"
>>  	depends on CHARGER_CROS_USBPD
>> diff --git a/drivers/platform/chrome/Makefile b/drivers/platform/chrome/Makefile
>> index aacd5920d8a18..caf2a9cdb5e6d 100644
>> --- a/drivers/platform/chrome/Makefile
>> +++ b/drivers/platform/chrome/Makefile
>> @@ -12,6 +12,7 @@ obj-$(CONFIG_CROS_EC_ISHTP)		+= cros_ec_ishtp.o
>>  obj-$(CONFIG_CROS_EC_RPMSG)		+= cros_ec_rpmsg.o
>>  obj-$(CONFIG_CROS_EC_SPI)		+= cros_ec_spi.o
>>  cros_ec_lpcs-objs			:= cros_ec_lpc.o cros_ec_lpc_mec.o
>> +obj-$(CONFIG_CROS_EC_TYPEC)		+= cros_ec_typec.o
>>  obj-$(CONFIG_CROS_EC_LPC)		+= cros_ec_lpcs.o
>>  obj-$(CONFIG_CROS_EC_PROTO)		+= cros_ec_proto.o cros_ec_trace.o
>>  obj-$(CONFIG_CROS_KBD_LED_BACKLIGHT)	+= cros_kbd_led_backlight.o
>> diff --git a/drivers/platform/chrome/cros_ec_typec.c b/drivers/platform/chrome/cros_ec_typec.c
>> new file mode 100644
>> index 0000000000000..02e6d5cbbbf7a
>> --- /dev/null
>> +++ b/drivers/platform/chrome/cros_ec_typec.c
>> @@ -0,0 +1,238 @@
>> +// SPDX-License-Identifier: GPL-2.0-only
>> +/*
>> + * Copyright 2020 Google LLC
>> + *
>> + * This driver provides the ability to view and manage Type C ports through the
>> + * Chrome OS EC.
>> + */
>> +
>> +#include <linux/acpi.h>
>> +#include <linux/module.h>
>> +#include <linux/of.h>
>> +#include <linux/platform_data/cros_ec_commands.h>
>> +#include <linux/platform_data/cros_ec_proto.h>
>> +#include <linux/platform_device.h>
>> +#include <linux/usb/typec.h>
>> +
>> +#define DRV_NAME "cros-ec-typec"
>> +
>> +/* Platform-specific data for the Chrome OS EC Type C controller. */
>> +struct cros_typec_data {
>> +	struct device *dev;
>> +	struct cros_ec_device *ec;
>> +	int num_ports;
>> +	/* Array of ports, indexed by port number. */
>> +	struct typec_port *ports[EC_USB_PD_MAX_PORTS];
>> +	/* Initial capabilities for each port. */
>> +	struct typec_capability *caps[EC_USB_PD_MAX_PORTS];
>> +};
>> +
>> +static int cros_typec_parse_port_props(struct typec_capability *cap,
>> +				       struct fwnode_handle *fwnode,
>> +				       struct device *dev)
>> +{
>> +	const char *buf;
>> +	int ret;
>> +
>> +	memset(cap, 0, sizeof(*cap));
>> +	ret = fwnode_property_read_string(fwnode, "power-role", &buf);
>> +	if (ret) {
>> +		dev_err(dev, "power-role not found: %d\n", ret);
>> +		return ret;
>> +	}
>> +
>> +	ret = typec_find_port_power_role(buf);
>> +	if (ret < 0)
>> +		return ret;
>> +	cap->type = ret;
>> +
>> +	ret = fwnode_property_read_string(fwnode, "data-role", &buf);
>> +	if (ret) {
>> +		dev_err(dev, "data-role not found: %d\n", ret);
>> +		return ret;
>> +	}
>> +
>> +	ret = typec_find_port_data_role(buf);
>> +	if (ret < 0)
>> +		return ret;
>> +	cap->data = ret;
>> +
>> +	ret = fwnode_property_read_string(fwnode, "try-power-role", &buf);
>> +	if (ret) {
>> +		dev_err(dev, "try-power-role not found: %d\n", ret);
>> +		return ret;
>> +	}
>> +
>> +	ret = typec_find_power_role(buf);
>> +	if (ret < 0)
>> +		return ret;
>> +	cap->prefer_role = ret;
>> +
>> +	cap->fwnode = fwnode;
>> +
>> +	return 0;
>> +}
>> +
>> +static int cros_typec_init_ports(struct cros_typec_data *typec)
>> +{
>> +	struct device *dev = typec->dev;
>> +	struct typec_capability *cap;
>> +	struct fwnode_handle *fwnode;
>> +	const char *port_prop;
>> +	int ret;
>> +	int i;
>> +	int nports;
>> +	u32 port_num = 0;
>> +
>> +	nports = device_get_child_node_count(dev);
>> +	if (nports == 0) {
>> +		dev_err(dev, "No port entries found.\n");
>> +		return -ENODEV;
>> +	}
>> +
>> +	if (nports > typec->num_ports) {
>> +		dev_err(dev, "More ports listed than can be supported.\n");
>> +		return -EINVAL;
>> +	}
>> +
>> +	/* DT uses "reg" to specify port number. */
>> +	port_prop = dev->of_node ? "reg" : "port-number";
>> +	device_for_each_child_node(dev, fwnode) {
>> +		if (fwnode_property_read_u32(fwnode, port_prop, &port_num)) {
>> +			ret = -EINVAL;
>> +			dev_err(dev, "No port-number for port, aborting.\n");
>> +			goto unregister_ports;
>> +		}
>> +
>> +		if (port_num >= typec->num_ports) {
>> +			dev_err(dev, "Invalid port number.\n");
>> +			ret = -EINVAL;
>> +			goto unregister_ports;
>> +		}
>> +
>> +		dev_dbg(dev, "Registering port %d\n", port_num);
>> +
>> +		cap = devm_kzalloc(dev, sizeof(*cap), GFP_KERNEL);
>> +		if (!cap) {
>> +			ret = -ENOMEM;
>> +			goto unregister_ports;
>> +		}
>> +
>> +		typec->caps[port_num] = cap;
>> +
>> +		ret = cros_typec_parse_port_props(cap, fwnode, dev);
>> +		if (ret < 0)
>> +			goto unregister_ports;
>> +
>> +		typec->ports[port_num] = typec_register_port(dev, cap);
>> +		if (IS_ERR(typec->ports[port_num])) {
>> +			dev_err(dev, "Failed to register port %d\n", port_num);
>> +			ret = PTR_ERR(typec->ports[port_num]);
>> +			goto unregister_ports;
>> +		}
>> +	}
>> +
>> +	return 0;
>> +
>> +unregister_ports:
>> +	for (i = 0; i < typec->num_ports; i++)
>> +		typec_unregister_port(typec->ports[i]);
>> +	return ret;
>> +}
>> +
>> +static int cros_typec_ec_command(struct cros_typec_data *typec,
>> +				 unsigned int version,
>> +				 unsigned int command,
>> +				 void *outdata,
>> +				 unsigned int outsize,
>> +				 void *indata,
>> +				 unsigned int insize)
>> +{
>> +	struct cros_ec_command *msg;
>> +	int ret;
>> +
>> +	msg = kzalloc(sizeof(*msg) + max(outsize, insize), GFP_KERNEL);
>> +	if (!msg)
>> +		return -ENOMEM;
>> +
>> +	msg->version = version;
>> +	msg->command = command;
>> +	msg->outsize = outsize;
>> +	msg->insize = insize;
>> +
>> +	if (outsize)
>> +		memcpy(msg->data, outdata, outsize);
>> +
>> +	ret = cros_ec_cmd_xfer_status(typec->ec, msg);
>> +	if (ret >= 0 && insize)
>> +		memcpy(indata, msg->data, insize);
>> +
>> +	kfree(msg);
>> +	return ret;
>> +}
>> +
>> +#ifdef CONFIG_ACPI
>> +static const struct acpi_device_id cros_typec_acpi_id[] = {
>> +	{ "GOOG0014", 0 },
>> +	{}
>> +};
>> +MODULE_DEVICE_TABLE(acpi, cros_typec_acpi_id);
>> +#endif
>> +
>> +#ifdef CONFIG_OF
>> +static const struct of_device_id cros_typec_of_match[] = {
>> +	{ .compatible = "google,cros-ec-typec", },
>> +	{}
>> +};
>> +MODULE_DEVICE_TABLE(of, cros_typec_of_match);
>> +#endif
>> +
>> +static int cros_typec_probe(struct platform_device *pdev)
>> +{
>> +	struct device *dev = &pdev->dev;
>> +	struct cros_typec_data *typec;
>> +	struct ec_response_usb_pd_ports resp;
>> +	int ret;
>> +
>> +	typec = devm_kzalloc(dev, sizeof(*typec), GFP_KERNEL);
>> +	if (!typec)
>> +		return -ENOMEM;
>> +
>> +	typec->dev = dev;
>> +	typec->ec = dev_get_drvdata(pdev->dev.parent);
>> +	platform_set_drvdata(pdev, typec);
>> +
>> +	ret = cros_typec_ec_command(typec, 0, EC_CMD_USB_PD_PORTS, NULL, 0,
>> +				    &resp, sizeof(resp));
>> +	if (ret < 0)
>> +		return ret;
>> +
>> +	typec->num_ports = resp.num_ports;
>> +	if (typec->num_ports > EC_USB_PD_MAX_PORTS) {
>> +		dev_warn(typec->dev,
>> +			 "Too many ports reported: %d, limiting to max: %d\n",
>> +			 typec->num_ports, EC_USB_PD_MAX_PORTS);
>> +		typec->num_ports = EC_USB_PD_MAX_PORTS;
>> +	}
>> +
>> +	ret = cros_typec_init_ports(typec);
>> +	if (ret < 0)
>> +		return ret;
>> +
>> +	return 0;
>> +}
>> +
>> +static struct platform_driver cros_typec_driver = {
>> +	.driver	= {
>> +		.name = DRV_NAME,
>> +		.acpi_match_table = ACPI_PTR(cros_typec_acpi_id),
>> +		.of_match_table = of_match_ptr(cros_typec_of_match),
>> +	},
>> +	.probe = cros_typec_probe,
>> +};
>> +
>> +module_platform_driver(cros_typec_driver);
>> +
>> +MODULE_AUTHOR("Prashant Malani <pmalani@chromium.org>");
>> +MODULE_DESCRIPTION("Chrome OS EC Type C control");
>> +MODULE_LICENSE("GPL");
>> -- 
>> 2.25.1.481.gfbce0eb801-goog
>>
> 

Re: [PATCH v5 1/4] dt-bindings: Add cros-ec Type C port driver

[Benson Leung]

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Hi Prashant,

On Mon, Mar 16, 2020 at 02:00:15AM -0700, Prashant Malani wrote:
> Some Chrome OS devices with Embedded Controllers (EC) can read and
> modify Type C port state.
> 
> Add an entry in the DT Bindings documentation that lists out the logical
> device and describes the relevant port information, to be used by the
> corresponding driver.
> 
> Signed-off-by: Prashant Malani <pmalani@chromium.org>

Reviewed-by: Benson Leung <bleung@chromium.org>

Hi Rob,

Will you go ahead and merge this through your tree for v5.7?

Thanks,
Benson

> ---
> 
> Changes in v5:
> - Updated License identifier.
> - Updated DT example to be a full example.
> 
> Changes in v4:
> - Rebased on top of usb-connector.yaml, so the connector property now
>   directly references the usb-connector DT binding.
> 
>  .../bindings/chrome/google,cros-ec-typec.yaml | 54 +++++++++++++++++++
>  1 file changed, 54 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/chrome/google,cros-ec-typec.yaml
> 
> diff --git a/Documentation/devicetree/bindings/chrome/google,cros-ec-typec.yaml b/Documentation/devicetree/bindings/chrome/google,cros-ec-typec.yaml
> new file mode 100644
> index 0000000000000..6d7396ab8beec
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/chrome/google,cros-ec-typec.yaml
> @@ -0,0 +1,54 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/chrome/google,cros-ec-typec.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Google Chrome OS EC(Embedded Controller) Type C port driver.
> +
> +maintainers:
> +  - Benson Leung <bleung@chromium.org>
> +  - Prashant Malani <pmalani@chromium.org>
> +
> +description:
> +  Chrome OS devices have an Embedded Controller(EC) which has access to
> +  Type C port state. This node is intended to allow the host to read and
> +  control the Type C ports. The node for this device should be under a
> +  cros-ec node like google,cros-ec-spi.
> +
> +properties:
> +  compatible:
> +    const: google,cros-ec-typec
> +
> +  connector:
> +    $ref: /schemas/connector/usb-connector.yaml#
> +
> +required:
> +  - compatible
> +
> +examples:
> +  - |+
> +    spi0 {
> +      #address-cells = <1>;
> +      #size-cells = <0>;
> +
> +      cros_ec: ec@0 {
> +        compatible = "google,cros-ec-spi";
> +        reg = <0>;
> +
> +        typec {
> +          compatible = "google,cros-ec-typec";
> +
> +          #address-cells = <1>;
> +          #size-cells = <0>;
> +
> +          connector@0 {
> +            compatible = "usb-c-connector";
> +            reg = <0>;
> +            power-role = "dual";
> +            data-role = "dual";
> +            try-power-role = "source";
> +          };
> +        };
> +      };
> +    };
> -- 
> 2.25.1.481.gfbce0eb801-goog
> 

-- 
Benson Leung
Staff Software Engineer
Chrome OS Kernel
Google Inc.
bleung@google.com
Chromium OS Project
bleung@chromium.org

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Re: [PATCH v5 1/4] dt-bindings: Add cros-ec Type C port driver

[Rob Herring]

On Mon, 16 Mar 2020 02:00:15 -0700, Prashant Malani wrote:
> Some Chrome OS devices with Embedded Controllers (EC) can read and
> modify Type C port state.
> 
> Add an entry in the DT Bindings documentation that lists out the logical
> device and describes the relevant port information, to be used by the
> corresponding driver.
> 
> Signed-off-by: Prashant Malani <pmalani@chromium.org>
> ---
> 
> Changes in v5:
> - Updated License identifier.
> - Updated DT example to be a full example.
> 
> Changes in v4:
> - Rebased on top of usb-connector.yaml, so the connector property now
>   directly references the usb-connector DT binding.
> 
>  .../bindings/chrome/google,cros-ec-typec.yaml | 54 +++++++++++++++++++
>  1 file changed, 54 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/chrome/google,cros-ec-typec.yaml
> 

Applied, thanks.

Rob