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From: Robert Foss <robert.foss@linaro.org>
To: agross@kernel.org, bjorn.andersson@linaro.org,
	robh+dt@kernel.org, mark.rutland@arm.com,
	catalin.marinas@arm.com, will@kernel.org, shawnguo@kernel.org,
	olof@lixom.net, maxime@cerno.tech, Anson.Huang@nxp.com,
	dinguyen@kernel.org, leonard.crestez@nxp.com,
	marcin.juszkiewicz@linaro.org, linux-arm-msm@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	Loic Poulain <loic.poulain@linaro.org>
Cc: Robert Foss <robert.foss@linaro.org>
Subject: [v2 1/6] arm64: dts: msm8916: Add i2c-qcom-cci node
Date: Tue, 17 Mar 2020 14:57:35 +0100	[thread overview]
Message-ID: <20200317135740.19412-2-robert.foss@linaro.org> (raw)
In-Reply-To: <20200317135740.19412-1-robert.foss@linaro.org>

From: Loic Poulain <loic.poulain@linaro.org>

The msm8916 CCI controller provides one CCI/I2C bus.

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Signed-off-by: Robert Foss <robert.foss@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---

Changes since v1:
 - Add label to cci node
 - Sort cci node by address
 - Relabel cci0 i2c bus to cci-i2c0

 arch/arm64/boot/dts/qcom/msm8916.dtsi | 27 +++++++++++++++++++++++++++
 1 file changed, 27 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index 9f31064f2374..1d5cb3fef906 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -1584,6 +1584,33 @@
 		};
 	};
 
+	cci: cci@1b0c000 {
+		compatible = "qcom,msm8916-cci";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0x1b0c000 0x1000>;
+		interrupts = <GIC_SPI 50 IRQ_TYPE_EDGE_RISING>;
+		clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>,
+			<&gcc GCC_CAMSS_CCI_AHB_CLK>,
+			<&gcc GCC_CAMSS_CCI_CLK>,
+			<&gcc GCC_CAMSS_AHB_CLK>;
+		clock-names = "camss_top_ahb", "cci_ahb",
+				  "cci", "camss_ahb";
+		assigned-clocks = <&gcc GCC_CAMSS_CCI_AHB_CLK>,
+				  <&gcc GCC_CAMSS_CCI_CLK>;
+		assigned-clock-rates = <80000000>, <19200000>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&cci0_default>;
+		status = "disabled";
+
+		cci_i2c0: i2c-bus@0 {
+			reg = <0>;
+			clock-frequency = <400000>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+	};
+
 	smd {
 		compatible = "qcom,smd";
 
-- 
2.20.1


  reply	other threads:[~2020-03-17 13:58 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-17 13:57 [v2 0/6] Qualcomm CCI & Camera for db410c & db845c Robert Foss
2020-03-17 13:57 ` Robert Foss [this message]
2020-03-17 13:57 ` [v2 2/6] arm64: dts: apq8016-sbc: Add CCI/Sensor nodes Robert Foss
2020-03-17 13:57 ` [v2 3/6] arm64: dts: sdm845: Add i2c-qcom-cci node Robert Foss
2020-03-17 13:57 ` [v2 4/6] arm64: dts: sdm845-db845c: Add pm_8998 gpio names Robert Foss
2020-03-17 13:57 ` [v2 5/6] arm64: dts: sdm845-db845c: Add ov8856 & ov7251 camera nodes Robert Foss
2020-03-17 13:57 ` [v2 6/6] arm64: defconfig: Enable QCOM CAMCC, CAMSS and CCI drivers Robert Foss
2020-03-20 19:52   ` Luca Weiss
2020-03-24 15:38     ` Robert Foss

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