From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.9 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,USER_AGENT_GIT autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 59824C2D0E7 for ; Wed, 1 Apr 2020 08:39:45 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 2E8FD2078B for ; Wed, 1 Apr 2020 08:39:45 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=st.com header.i=@st.com header.b="xtrcxr1E" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731834AbgDAIjo (ORCPT ); Wed, 1 Apr 2020 04:39:44 -0400 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:30290 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726368AbgDAIjn (ORCPT ); Wed, 1 Apr 2020 04:39:43 -0400 Received: from pps.filterd (m0046037.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 0318buli010433; Wed, 1 Apr 2020 10:39:22 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : cc : subject : date : message-id : mime-version : content-type; s=STMicroelectronics; bh=lzzw7FXM0MO9eFzpIxeWfpnrQEPQjgWmRDZU797bXb8=; b=xtrcxr1EAvv7HnNqNv9zC+wI60OE8e8OmAvMRjfnYxqkn8Xaphz9JIFc/mU1K1LkZmMh 5ihsorr2LVId7ONlbCmT05Jy7DYRYYNWXmleCIqweN+XizU/EOr24WuxhBW6/36YBUay aN0hchzyNFAW92C7SjqCJR2a4Ke+gZUilqdwUIzYyUehmlkuJbOs7kBwJQqEM1tOT56x TrRaYgUEgRnc5aNGW3bXnqHK5JvJuaSvvfHFSU9/owDtNddT6nCzKhjV2It591+wbno5 3ajHWBVZba9hszEmi6E6PIj6xN8s0Mf14b35GwxkfQMX7f0Q2lUuVT5NmULsYEiY3mdK Vg== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 301w813w5g-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 01 Apr 2020 10:39:22 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id A386510002A; Wed, 1 Apr 2020 10:39:21 +0200 (CEST) Received: from Webmail-eu.st.com (sfhdag3node3.st.com [10.75.127.9]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 8BADA21CA86; Wed, 1 Apr 2020 10:39:21 +0200 (CEST) Received: from localhost (10.75.127.47) by SFHDAG3NODE3.st.com (10.75.127.9) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 1 Apr 2020 10:39:21 +0200 From: Benjamin Gaignard To: , , , , , , , CC: , , , , Benjamin Gaignard Subject: [PATCH v6 0/6] clockevent: add low power STM32 timer Date: Wed, 1 Apr 2020 10:39:03 +0200 Message-ID: <20200401083909.18886-1-benjamin.gaignard@st.com> X-Mailer: git-send-email 2.15.0 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.75.127.47] X-ClientProxiedBy: SFHDAG6NODE2.st.com (10.75.127.17) To SFHDAG3NODE3.st.com (10.75.127.9) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138,18.0.676 definitions=2020-03-31_07:2020-03-31,2020-03-31 signatures=0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This series add low power timer as boadcast clockevent device. Low power timer could runs even when CPUs are in idle mode and could wakeup them. version 6: - simplify binding, DT and code to use only one interrupt version 5: - document interrupts and interrupt-names bindings - use a different wake up interrupt - add device-tree patch - make STM32MP157 select low power timer configuration flag - enable fast_io in regmap configuration version 4: - move defines in mfd/stm32-lptimer.h - change compatible and subnode names - document wakeup-source property - reword commit message - make driver Kconfig depends of MFD_STM32_LPTIMER - remove useless include - remove rate and clk fields from the private structure - to add comments about the registers sequence in stm32_clkevent_lp_set_timer - rework probe function and use devm_request_irq() - do not allow module to be removed version 3: - fix timer set sequence - don't forget to free irq on remove function - use devm_kzalloc to simplify errors handling in probe function version 2: - stm32 clkevent driver is now a child of the stm32 lp timer node - add a probe function and adpat the driver to use regmap provide by it parent - stop using timer_of helpers Benjamin Gaignard (6): dt-bindings: mfd: Document STM32 low power timer bindings ARM: dts: stm32: Add timer subnodes on stm32mp15 SoCs mfd: stm32: Add defines to be used for clkevent purpose mfd: stm32: enable regmap fast_io for stm32-lptimer clocksource: Add Low Power STM32 timers driver ARM: mach-stm32: select low power timer for STM32MP157 .../devicetree/bindings/mfd/st,stm32-lptimer.yaml | 21 ++ arch/arm/boot/dts/stm32mp151.dtsi | 35 ++++ arch/arm/mach-stm32/Kconfig | 1 + drivers/clocksource/Kconfig | 4 + drivers/clocksource/Makefile | 1 + drivers/clocksource/timer-stm32-lp.c | 221 +++++++++++++++++++++ drivers/mfd/stm32-lptimer.c | 1 + include/linux/mfd/stm32-lptimer.h | 5 + 8 files changed, 289 insertions(+) create mode 100644 drivers/clocksource/timer-stm32-lp.c -- 2.15.0