From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3DE08C2BA13 for ; Wed, 1 Apr 2020 16:42:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D5C0C212CC for ; Wed, 1 Apr 2020 16:42:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1585759321; bh=q1aL0a/VJCfQ9m9whGxRTfJG3Nlqhr4LwQIGM1UqscI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=BxDWIi4ynhRVTYckE+Fxs81wc5KmsRzEjhHrIGST1K7sdLRV7FiBTaVvDz06KiVJc 96DHPZ0dTzx/D/T8mBCpnb2UV4vK4WvMOpJiJ8aCjVm6KfBkPqqXHwd4ki6lD0PVDj PdBn9oXJxkMqfqFYQVCYePScP59QpmV198Kne/js= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389472AbgDAQl7 (ORCPT ); Wed, 1 Apr 2020 12:41:59 -0400 Received: from mail.kernel.org ([198.145.29.99]:42426 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389162AbgDAQl4 (ORCPT ); Wed, 1 Apr 2020 12:41:56 -0400 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id B314820719; Wed, 1 Apr 2020 16:41:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1585759315; bh=q1aL0a/VJCfQ9m9whGxRTfJG3Nlqhr4LwQIGM1UqscI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=TwXydI7m8BH4IVMRFd60BmeiWUMtmJUlA0i3JqOWqt6iZLiZk2hVCYFA643ztUZKM SVuTEdLWRdC/3Oe648CDZ8LSVBX64GR3U5t83r7qUz/116wTXrOLwi6vIrRemIG2HN 1QtbzphdNXoxQ0TswAFe++WypzU3JhNPExPwAOmI= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Eugen Hristev , Stable@vger.kernel.org, Jonathan Cameron , Sasha Levin Subject: [PATCH 4.14 043/148] iio: adc: at91-sama5d2_adc: fix differential channels in triggered mode Date: Wed, 1 Apr 2020 18:17:15 +0200 Message-Id: <20200401161556.982068569@linuxfoundation.org> X-Mailer: git-send-email 2.26.0 In-Reply-To: <20200401161552.245876366@linuxfoundation.org> References: <20200401161552.245876366@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Eugen Hristev [ Upstream commit a500f3bd787f8224341e44b238f318c407b10897 ] The differential channels require writing the channel offset register (COR). Otherwise they do not work in differential mode. The configuration of COR is missing in triggered mode. Fixes: 5e1a1da0f8c9 ("iio: adc: at91-sama5d2_adc: add hw trigger and buffer support") Signed-off-by: Eugen Hristev Cc: Signed-off-by: Jonathan Cameron Signed-off-by: Sasha Levin --- drivers/iio/adc/at91-sama5d2_adc.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/iio/adc/at91-sama5d2_adc.c b/drivers/iio/adc/at91-sama5d2_adc.c index 0898f40c2b892..34639ee2d2ce6 100644 --- a/drivers/iio/adc/at91-sama5d2_adc.c +++ b/drivers/iio/adc/at91-sama5d2_adc.c @@ -339,9 +339,24 @@ static int at91_adc_configure_trigger(struct iio_trigger *trig, bool state) for_each_set_bit(bit, indio->active_scan_mask, indio->num_channels) { struct iio_chan_spec const *chan = at91_adc_chan_get(indio, bit); + u32 cor; if (!chan) continue; + if (state) { + cor = at91_adc_readl(st, AT91_SAMA5D2_COR); + + if (chan->differential) + cor |= (BIT(chan->channel) | + BIT(chan->channel2)) << + AT91_SAMA5D2_COR_DIFF_OFFSET; + else + cor &= ~(BIT(chan->channel) << + AT91_SAMA5D2_COR_DIFF_OFFSET); + + at91_adc_writel(st, AT91_SAMA5D2_COR, cor); + } + if (state) { at91_adc_writel(st, AT91_SAMA5D2_CHER, BIT(chan->channel)); -- 2.20.1