From: Eric Auger <eric.auger@redhat.com>
To: eric.auger.pro@gmail.com, eric.auger@redhat.com,
iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org,
kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu,
will@kernel.org, joro@8bytes.org, maz@kernel.org,
robin.murphy@arm.com
Cc: jean-philippe@linaro.org, zhangfei.gao@linaro.org,
shameerali.kolothum.thodi@huawei.com, alex.williamson@redhat.com,
jacob.jun.pan@linux.intel.com, yi.l.liu@intel.com,
peter.maydell@linaro.org, zhangfei.gao@gmail.com,
tn@semihalf.com, zhangfei.gao@foxmail.com, bbhushan2@marvell.com
Subject: [PATCH v11 08/13] iommu/smmuv3: Implement cache_invalidate
Date: Tue, 14 Apr 2020 17:06:02 +0200 [thread overview]
Message-ID: <20200414150607.28488-9-eric.auger@redhat.com> (raw)
In-Reply-To: <20200414150607.28488-1-eric.auger@redhat.com>
Implement domain-selective and page-selective IOTLB invalidations.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
---
v7 -> v8:
- ASID based invalidation using iommu_inv_pasid_info
- check ARCHID/PASID flags in addr based invalidation
- use __arm_smmu_tlb_inv_context and __arm_smmu_tlb_inv_range_nosync
v6 -> v7
- check the uapi version
v3 -> v4:
- adapt to changes in the uapi
- add support for leaf parameter
- do not use arm_smmu_tlb_inv_range_nosync or arm_smmu_tlb_inv_context
anymore
v2 -> v3:
- replace __arm_smmu_tlb_sync by arm_smmu_cmdq_issue_sync
v1 -> v2:
- properly pass the asid
---
drivers/iommu/arm-smmu-v3.c | 53 +++++++++++++++++++++++++++++++++++++
1 file changed, 53 insertions(+)
diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
index 4ec2106be301..38854c3e4083 100644
--- a/drivers/iommu/arm-smmu-v3.c
+++ b/drivers/iommu/arm-smmu-v3.c
@@ -3413,6 +3413,58 @@ static void arm_smmu_detach_pasid_table(struct iommu_domain *domain)
mutex_unlock(&smmu_domain->init_mutex);
}
+static int
+arm_smmu_cache_invalidate(struct iommu_domain *domain, struct device *dev,
+ struct iommu_cache_invalidate_info *inv_info)
+{
+ struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain);
+ struct arm_smmu_device *smmu = smmu_domain->smmu;
+
+ if (smmu_domain->stage != ARM_SMMU_DOMAIN_NESTED)
+ return -EINVAL;
+
+ if (!smmu)
+ return -EINVAL;
+
+ if (inv_info->version != IOMMU_CACHE_INVALIDATE_INFO_VERSION_1)
+ return -EINVAL;
+
+ if (inv_info->cache & IOMMU_CACHE_INV_TYPE_IOTLB) {
+ if (inv_info->granularity == IOMMU_INV_GRANU_PASID) {
+ struct iommu_inv_pasid_info *info =
+ &inv_info->pasid_info;
+
+ if (!(info->flags & IOMMU_INV_PASID_FLAGS_ARCHID) ||
+ (info->flags & IOMMU_INV_PASID_FLAGS_PASID))
+ return -EINVAL;
+
+ __arm_smmu_tlb_inv_context(smmu_domain, info->archid);
+
+ } else if (inv_info->granularity == IOMMU_INV_GRANU_ADDR) {
+ struct iommu_inv_addr_info *info = &inv_info->addr_info;
+ size_t size = info->nb_granules * info->granule_size;
+ bool leaf = info->flags & IOMMU_INV_ADDR_FLAGS_LEAF;
+
+ if (!(info->flags & IOMMU_INV_ADDR_FLAGS_ARCHID) ||
+ (info->flags & IOMMU_INV_ADDR_FLAGS_PASID))
+ return -EINVAL;
+
+ __arm_smmu_tlb_inv_range(info->addr, size,
+ info->granule_size, leaf,
+ smmu_domain, info->archid);
+
+ arm_smmu_cmdq_issue_sync(smmu);
+ } else {
+ return -EINVAL;
+ }
+ }
+ if (inv_info->cache & IOMMU_CACHE_INV_TYPE_PASID ||
+ inv_info->cache & IOMMU_CACHE_INV_TYPE_DEV_IOTLB) {
+ return -ENOENT;
+ }
+ return 0;
+}
+
static struct iommu_ops arm_smmu_ops = {
.capable = arm_smmu_capable,
.domain_alloc = arm_smmu_domain_alloc,
@@ -3433,6 +3485,7 @@ static struct iommu_ops arm_smmu_ops = {
.put_resv_regions = generic_iommu_put_resv_regions,
.attach_pasid_table = arm_smmu_attach_pasid_table,
.detach_pasid_table = arm_smmu_detach_pasid_table,
+ .cache_invalidate = arm_smmu_cache_invalidate,
.pgsize_bitmap = -1UL, /* Restricted during device attach */
};
--
2.20.1
next prev parent reply other threads:[~2020-04-14 15:12 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-14 15:05 [PATCH v11 00/13] SMMUv3 Nested Stage Setup (IOMMU part) Eric Auger
2020-04-14 15:05 ` [PATCH v11 01/13] iommu: Introduce attach/detach_pasid_table API Eric Auger
2020-04-14 22:15 ` Jacob Pan
2020-04-15 14:52 ` Auger Eric
2020-04-15 15:59 ` Jacob Pan
2020-04-15 16:02 ` Auger Eric
2020-04-14 15:05 ` [PATCH v11 02/13] iommu: Introduce bind/unbind_guest_msi Eric Auger
2020-04-14 15:05 ` [PATCH v11 03/13] iommu/arm-smmu-v3: Maintain a SID->device structure Eric Auger
2020-04-14 15:05 ` [PATCH v11 04/13] iommu/smmuv3: Dynamically allocate s1_cfg and s2_cfg Eric Auger
2020-04-14 15:05 ` [PATCH v11 05/13] iommu/smmuv3: Get prepared for nested stage support Eric Auger
2020-04-14 15:06 ` [PATCH v11 06/13] iommu/smmuv3: Implement attach/detach_pasid_table Eric Auger
2020-04-14 15:06 ` [PATCH v11 07/13] iommu/smmuv3: Allow stage 1 invalidation with unmanaged ASIDs Eric Auger
2020-04-14 15:06 ` Eric Auger [this message]
2020-04-14 15:06 ` [PATCH v11 09/13] dma-iommu: Implement NESTED_MSI cookie Eric Auger
2020-04-14 15:06 ` [PATCH v11 10/13] iommu/smmuv3: Nested mode single MSI doorbell per domain enforcement Eric Auger
2020-04-14 15:06 ` [PATCH v11 11/13] iommu/smmuv3: Enforce incompatibility between nested mode and HW MSI regions Eric Auger
2020-04-14 15:06 ` [PATCH v11 12/13] iommu/smmuv3: Implement bind/unbind_guest_msi Eric Auger
2020-04-14 15:06 ` [PATCH v11 13/13] iommu/smmuv3: Report non recoverable faults Eric Auger
2020-04-16 4:25 ` [PATCH v11 00/13] SMMUv3 Nested Stage Setup (IOMMU part) Zhangfei Gao
2020-04-16 7:45 ` Auger Eric
2020-04-30 9:39 ` Shameerali Kolothum Thodi
2020-05-07 6:59 ` Shameerali Kolothum Thodi
2020-05-07 7:45 ` Auger Eric
2020-05-13 13:28 ` Auger Eric
2020-05-13 15:57 ` Shameerali Kolothum Thodi
2020-11-17 8:39 ` Auger Eric
2020-11-17 9:16 ` Shameerali Kolothum Thodi
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