From: Yuantian Tang <andy.tang@nxp.com>
To: rui.zhang@intel.com, edubezval@gmail.com, daniel.lezcano@linaro.org
Cc: linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org,
Yuantian Tang <andy.tang@nxp.com>
Subject: [PATCH v2] thermal: qoriq: Update the settings for TMUv2
Date: Thu, 16 Apr 2020 17:39:40 +0800 [thread overview]
Message-ID: <20200416093940.34371-1-andy.tang@nxp.com> (raw)
For TMU v2, TMSAR registers need to be set properly to get the
accurate temperature values.
Also temperature reading needs to convert to degree Celsius
since it is in degrees Kelvin.
Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
---
v2:
- change the temp in millicelsius
drivers/thermal/qoriq_thermal.c | 15 ++++++++++++++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/drivers/thermal/qoriq_thermal.c b/drivers/thermal/qoriq_thermal.c
index 028a6bbf75dc..f6371127f707 100644
--- a/drivers/thermal/qoriq_thermal.c
+++ b/drivers/thermal/qoriq_thermal.c
@@ -23,6 +23,7 @@
#define TMTMIR_DEFAULT 0x0000000f
#define TIER_DISABLE 0x0
#define TEUMR0_V2 0x51009c00
+#define TMSARA_V2 0xe
#define TMU_VER1 0x1
#define TMU_VER2 0x2
@@ -50,6 +51,9 @@
* Site Register
*/
#define TRITSR_V BIT(31)
+#define REGS_V2_TMSAR(n) (0x304 + 16 * (n)) /* TMU monitoring
+ * site adjustment register
+ */
#define REGS_TTRnCR(n) (0xf10 + 4 * (n)) /* Temperature Range n
* Control Register
*/
@@ -100,7 +104,11 @@ static int tmu_get_temp(void *p, int *temp)
10 * USEC_PER_MSEC))
return -ENODATA;
- *temp = (val & 0xff) * 1000;
+ /* For TMUv2, temperature reading in degrees Kelvin */
+ if (qdata->ver == TMU_VER1)
+ *temp = (val & 0xff) * 1000;
+ else
+ *temp = ((val & 0x1ff) - 273) * 1000;
return 0;
}
@@ -192,6 +200,8 @@ static int qoriq_tmu_calibration(struct device *dev,
static void qoriq_tmu_init_device(struct qoriq_tmu_data *data)
{
+ int i;
+
/* Disable interrupt, using polling instead */
regmap_write(data->regmap, REGS_TIER, TIER_DISABLE);
@@ -202,6 +212,8 @@ static void qoriq_tmu_init_device(struct qoriq_tmu_data *data)
} else {
regmap_write(data->regmap, REGS_V2_TMTMIR, TMTMIR_DEFAULT);
regmap_write(data->regmap, REGS_V2_TEUMR(0), TEUMR0_V2);
+ for (i = 0; i < 7; i++)
+ regmap_write(data->regmap, REGS_V2_TMSAR(i), TMSARA_V2);
}
/* Disable monitoring */
@@ -212,6 +224,7 @@ static const struct regmap_range qoriq_yes_ranges[] = {
regmap_reg_range(REGS_TMR, REGS_TSCFGR),
regmap_reg_range(REGS_TTRnCR(0), REGS_TTRnCR(3)),
regmap_reg_range(REGS_V2_TEUMR(0), REGS_V2_TEUMR(2)),
+ regmap_reg_range(REGS_V2_TMSAR(0), REGS_V2_TMSAR(15)),
regmap_reg_range(REGS_IPBRR(0), REGS_IPBRR(1)),
/* Read only registers below */
regmap_reg_range(REGS_TRITSR(0), REGS_TRITSR(15)),
--
2.17.1
next reply other threads:[~2020-04-16 9:54 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-16 9:39 Yuantian Tang [this message]
2020-05-07 6:20 ` [PATCH v2] thermal: qoriq: Update the settings for TMUv2 Andy Tang
2020-05-22 16:44 ` Daniel Lezcano
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