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From: Evalds Iodzevics <evalds.iodzevics@gmail.com>
To: linux-kernel@vger.kernel.org
Cc: gregkh@linuxfoundation.org, tglx@linutronix.de,
	Evalds Iodzevics <evalds.iodzevics@gmail.com>
Subject: [PATCH] x86/microcode/intel: replace sync_core() with native_cpuid_reg(eax)
Date: Mon, 20 Apr 2020 15:00:37 +0300	[thread overview]
Message-ID: <20200420120037.1537-1-evalds.iodzevics@gmail.com> (raw)

sync_core() always jums past cpuid instruction on 32 bit machines
because data structure boot_cpu_data are not populated so early in boot.

It depends on commit 5dedade6dfa243c130b85d1e4daba6f027805033 for
native_cpuid_reg(eax) definitions

This patch is for 4.4 but also should apply to 4.9

Signed-off-by: Evalds Iodzevics <evalds.iodzevics@gmail.com>
---
 arch/x86/include/asm/microcode_intel.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/include/asm/microcode_intel.h b/arch/x86/include/asm/microcode_intel.h
index 90343ba50485..92ce9c8a508b 100644
--- a/arch/x86/include/asm/microcode_intel.h
+++ b/arch/x86/include/asm/microcode_intel.h
@@ -60,7 +60,7 @@ static inline u32 intel_get_microcode_revision(void)
 	native_wrmsrl(MSR_IA32_UCODE_REV, 0);
 
 	/* As documented in the SDM: Do a CPUID 1 here */
-	sync_core();
+	native_cpuid_eax(1);
 
 	/* get the current revision from MSR 0x8B */
 	native_rdmsr(MSR_IA32_UCODE_REV, dummy, rev);
-- 
2.17.4


             reply	other threads:[~2020-04-20  9:00 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-20 12:00 Evalds Iodzevics [this message]
2020-04-20  9:31 ` [PATCH] x86/microcode/intel: replace sync_core() with native_cpuid_reg(eax) Borislav Petkov
2020-04-20 13:33   ` Ben Hutchings
2020-04-20 14:01     ` Evalds Iodzevics
2020-04-20  9:57 ` Greg KH
2020-04-21  8:53 ` [PATCH v2] " Evalds Iodzevics
2020-04-21  5:59   ` Greg KH
2020-04-21  6:41     ` Evalds Iodzevics
2020-04-21  7:19       ` Greg KH

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