From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C5D24C3815B for ; Mon, 20 Apr 2020 12:42:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A293D2070B for ; Mon, 20 Apr 2020 12:42:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1587386536; bh=2Ie6yKzF7v/mul/AuyrteBRsfgDx4BWHEpn8CwEjUOA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=iVa/jRR7dDS3RLSKrX8XOfZjaYOchyi+j+KEt9ba/wocts1Ple/Y36RdYqty2KN5/ rVvrRFTDqRJkBPV1PlmCdI5gxs8JNfIvffTxKvqL0fuuLKEBAOcgWgtv0WcVugWT8i 1f+cdMXSaRaBw9LDikgKPhpNfJrMWseCX3PelYvM= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728183AbgDTMmP (ORCPT ); Mon, 20 Apr 2020 08:42:15 -0400 Received: from mail.kernel.org ([198.145.29.99]:35112 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728165AbgDTMmL (ORCPT ); Mon, 20 Apr 2020 08:42:11 -0400 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 8CCA120724; Mon, 20 Apr 2020 12:42:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1587386531; bh=2Ie6yKzF7v/mul/AuyrteBRsfgDx4BWHEpn8CwEjUOA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=QgyMpaPmGOFwVTSHRf4aPYjCyA/HZqI3EN1xXeaAbNjqpBosyDkrmQV7PG7EJ5DrY fMHj4g5cBmtg/QHkuKzn5sL2fFonlHcu3RKNmwLsB53HPtW86CJx5+h1/UGvyhrC0s 5Q8PdpSOO/2E3r+uL87BmHlHMPKBu04Zo4tcg47c= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Grygorii Strashko , Marc Zyngier , Lokesh Vutla Subject: [PATCH 5.5 60/65] irqchip/ti-sci-inta: Fix processing of masked irqs Date: Mon, 20 Apr 2020 14:39:04 +0200 Message-Id: <20200420121519.534397137@linuxfoundation.org> X-Mailer: git-send-email 2.26.1 In-Reply-To: <20200420121505.909671922@linuxfoundation.org> References: <20200420121505.909671922@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Grygorii Strashko commit 3688b0db5c331f4ec3fa5eb9f670a4b04f530700 upstream. The ti_sci_inta_irq_handler() does not take into account INTA IRQs state (masked/unmasked) as it uses INTA_STATUS_CLEAR_j register to get INTA IRQs status, which provides raw status value. This causes hard IRQ handlers to be called or threaded handlers to be scheduled many times even if corresponding INTA IRQ is masked. Above, first of all, affects the LEVEL interrupts processing and causes unexpected behavior up the system stack or crash. Fix it by using the Interrupt Masked Status INTA_STATUSM_j register which provides masked INTA IRQs status. Fixes: 9f1463b86c13 ("irqchip/ti-sci-inta: Add support for Interrupt Aggregator driver") Signed-off-by: Grygorii Strashko Signed-off-by: Marc Zyngier Reviewed-by: Lokesh Vutla Link: https://lore.kernel.org/r/20200408191532.31252-1-grygorii.strashko@ti.com Cc: stable@vger.kernel.org Signed-off-by: Greg Kroah-Hartman --- drivers/irqchip/irq-ti-sci-inta.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) --- a/drivers/irqchip/irq-ti-sci-inta.c +++ b/drivers/irqchip/irq-ti-sci-inta.c @@ -37,6 +37,7 @@ #define VINT_ENABLE_SET_OFFSET 0x0 #define VINT_ENABLE_CLR_OFFSET 0x8 #define VINT_STATUS_OFFSET 0x18 +#define VINT_STATUS_MASKED_OFFSET 0x20 /** * struct ti_sci_inta_event_desc - Description of an event coming to @@ -116,7 +117,7 @@ static void ti_sci_inta_irq_handler(stru chained_irq_enter(irq_desc_get_chip(desc), desc); val = readq_relaxed(inta->base + vint_desc->vint_id * 0x1000 + - VINT_STATUS_OFFSET); + VINT_STATUS_MASKED_OFFSET); for_each_set_bit(bit, &val, MAX_EVENTS_PER_VINT) { virq = irq_find_mapping(domain, vint_desc->events[bit].hwirq);