From: Serge Semin <Sergey.Semin@baikalelectronics.ru>
To: Rob Herring <robh@kernel.org>
Cc: Serge Semin <fancer.lancer@gmail.com>,
Paul Cercueil <paul@crapouillou.net>,
Masahiro Yamada <yamada.masahiro@socionext.com>, <soc@kernel.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Thomas Gleixner <tglx@linutronix.de>,
Rob Herring <robh+dt@kernel.org>, Olof Johansson <olof@lixom.net>,
<linux-kernel@vger.kernel.org>, Arnd Bergmann <arnd@arndb.de>,
Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>,
Boris Brezillon <bbrezillon@kernel.org>,
Paul Burton <paulburton@kernel.org>, <devicetree@vger.kernel.org>,
Ralf Baechle <ralf@linux-mips.org>, <linux-mips@vger.kernel.org>
Subject: Re: [PATCH v2 1/2] dt-bindings: memory: Add Baikal-T1 L2-cache Control Block binding
Date: Mon, 11 May 2020 23:25:25 +0300 [thread overview]
Message-ID: <20200511202525.2qg472f5spkeajia@mobilestation> (raw)
In-Reply-To: <20200511153804.GA7015@bogus>
On Mon, May 11, 2020 at 10:38:04AM -0500, Rob Herring wrote:
> On Fri, 8 May 2020 02:07:03 +0300, Serge Semin wrote:
> > There is a single register provided by the SoC system controller,
> > which can be used to tune the L2-cache RAM up. It only provides a way
> > to change the L2-RAM access latencies. So aside from "be,bt1-l2-ctl"
> > compatible string the device node can be optionally equipped with the
> > properties of Tag/Data/WS latencies.
> >
> > Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
> > Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>
> > Cc: Paul Burton <paulburton@kernel.org>
> > Cc: Ralf Baechle <ralf@linux-mips.org>
> > Cc: Olof Johansson <olof@lixom.net>
> > Cc: Boris Brezillon <bbrezillon@kernel.org>
> > Cc: Paul Cercueil <paul@crapouillou.net>
> > Cc: Thomas Gleixner <tglx@linutronix.de>
> > Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
> > Cc: linux-mips@vger.kernel.org
> > Cc: soc@kernel.org
> >
> > ---
> >
> > Changelog v2:
> > - Move driver to the memory subsystem.
> > - Use dual GPL/BSD license.
> > - Use single lined copyright header.
> > - Move "allOf" restrictions to the root level of the properties.
> > - Discard syscon compatible string and reg property.
> > - The DT node is supposed to be a child of the Baikal-T1 system controller
> > node.
> > ---
> > .../memory-controllers/baikal,bt1-l2-ctl.yaml | 59 +++++++++++++++++++
> > 1 file changed, 59 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/memory-controllers/baikal,bt1-l2-ctl.yaml
> >
>
>
> My bot found errors running 'make dt_binding_check' on your patch:
>
> [nip] ...
>
> See https://patchwork.ozlabs.org/patch/1285665
>
> If you already ran 'make dt_binding_check' and didn't see the above
> error(s), then make sure dt-schema is up to date:
>
> pip3 install git+https://github.com/devicetree-org/dt-schema.git@master --upgrade
>
> Please check and re-submit.
>
The problem is due to an absent vendor prefix in the test kernel source tree
environment. As I said in the cover-letter the new vendor prefix will be added
in the framework of the next patchset:
https://lkml.org/lkml/2020/5/6/1047
Rob, please review that patchset first, merge in the corresponding patch from
there and test this binding out then.
-Sergey
next prev parent reply other threads:[~2020-05-11 20:25 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-06 13:07 [PATCH 0/6] soc: Add Baikal-T1 SoC APB/AXI EHB and L2-cache drivers Sergey.Semin
2020-03-06 15:19 ` Arnd Bergmann
2020-03-12 21:25 ` Rob Herring
2020-04-01 15:32 ` Sergey Semin
2020-03-26 14:12 ` Arnd Bergmann
2020-04-01 15:37 ` Sergey Semin
2020-03-12 21:26 ` Rob Herring
[not found] ` <20200306153246.9373B80307C4@mail.baikalelectronics.ru>
2020-04-01 15:06 ` Sergey Semin
2020-04-01 19:10 ` Arnd Bergmann
2020-04-01 21:52 ` Sergey Semin
2020-05-07 22:41 ` [PATCH v2 0/4] bus: Add Baikal-T1 SoC APB/AXI bus drivers Serge Semin
2020-05-07 22:41 ` [PATCH v2 1/4] dt-bindings: bus: Add Baikal-T1 AXI-bus binding Serge Semin
2020-05-15 3:13 ` Rob Herring
2020-05-07 22:41 ` [PATCH v2 2/4] dt-bindings: bus: Add Baikal-T1 APB-bus binding Serge Semin
2020-05-15 3:13 ` Rob Herring
2020-05-07 22:41 ` [PATCH v2 3/4] bus: Add Baikal-T1 AXI-bus driver Serge Semin
2020-05-07 22:41 ` [PATCH v2 4/4] bus: Add Baikal-T1 APB-bus driver Serge Semin
2020-05-07 23:07 ` [PATCH v2 0/2] memory: Add Baikal-T1 L2-cache driver Serge Semin
2020-05-07 23:07 ` [PATCH v2 1/2] dt-bindings: memory: Add Baikal-T1 L2-cache Control Block binding Serge Semin
2020-05-11 15:38 ` Rob Herring
2020-05-11 20:25 ` Serge Semin [this message]
[not found] ` <CAL_JsqJEZF5xkNGGiBy5rgUFfg=hWp6qi=tzFW84cGD9m-p5SA@mail.gmail.com>
2020-05-12 18:31 ` Serge Semin
[not found] ` <CAL_Jsq+rka7hXVy46=O3pTrN0DLCAQQ=TSpSqzoB2dxb30h66g@mail.gmail.com>
2020-05-12 18:25 ` Serge Semin
2020-05-19 12:27 ` Serge Semin
2020-05-07 23:07 ` [PATCH v2 2/2] memory: Add Baikal-T1 L2-cache Control Block driver Serge Semin
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