From: Serge Semin <Sergey.Semin@baikalelectronics.ru>
To: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: Serge Semin <fancer.lancer@gmail.com>,
Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>,
Mark Brown <broonie@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Georgy Vlasov <Georgy.Vlasov@baikalelectronics.ru>,
Ramil Zaripov <Ramil.Zaripov@baikalelectronics.ru>,
Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>,
Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
Paul Burton <paulburton@kernel.org>,
Ralf Baechle <ralf@linux-mips.org>, Arnd Bergmann <arnd@arndb.de>,
Allison Randal <allison@lohutok.net>,
Gareth Williams <gareth.williams.jx@renesas.com>,
<linux-mips@vger.kernel.org>, <linux-spi@vger.kernel.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 01/17] dt-bindings: spi: Convert DW SPI binding to DT schema
Date: Tue, 12 May 2020 23:28:14 +0300 [thread overview]
Message-ID: <20200512202814.e6havutfpzu2gdfc@mobilestation> (raw)
In-Reply-To: <20200508193934.GY185537@smile.fi.intel.com>
+Cc: Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>
On Fri, May 08, 2020 at 10:39:34PM +0300, Andy Shevchenko wrote:
> On Fri, May 08, 2020 at 04:29:26PM +0300, Serge Semin wrote:
> > Modern device tree bindings are supposed to be created as YAML-files
> > in accordance with dt-schema. This commit replaces two DW SPI legacy
> > bare text bindings with YAML file. As before the bindings file states
> > that the corresponding dts node is supposed to be compatible either
> > with generic DW APB SSI controller or with Microsemi/Amazon/Renesas
> > vendors-specific controllers, to have registers, interrupts and clocks
> > properties. Though in case of Microsemi version of the controller
> > there must be two registers resources specified. Properties like
> > clock-names, reg-io-width, cs-gpio, num-cs and SPI-specific sub-nodes
> > are optional.
>
> Can you incorporate work done here or agree with Wan how to proceed?
>
> https://lore.kernel.org/linux-spi/20200505191910.GA2970@bogus/T/#md626b5f6f2294b0ebd70995d5ed0e67a360e000b
Don't worry. I'll make sure the updates provided by Wan including the new IP
support are preserved after rebasing this series on top of the spi/for-next.
-Sergey
>
> >
> > Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
> > Cc: Georgy Vlasov <Georgy.Vlasov@baikalelectronics.ru>
> > Cc: Ramil Zaripov <Ramil.Zaripov@baikalelectronics.ru>
> > Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>
> > Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
> > Cc: Paul Burton <paulburton@kernel.org>
> > Cc: Ralf Baechle <ralf@linux-mips.org>
> > Cc: Arnd Bergmann <arnd@arndb.de>
> > Cc: Allison Randal <allison@lohutok.net>
> > Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
> > Cc: Gareth Williams <gareth.williams.jx@renesas.com>
> > Cc: linux-mips@vger.kernel.org
> > ---
> > .../bindings/spi/snps,dw-apb-ssi.txt | 41 -------
> > .../bindings/spi/snps,dw-apb-ssi.yaml | 113 ++++++++++++++++++
> > .../devicetree/bindings/spi/spi-dw.txt | 24 ----
> > 3 files changed, 113 insertions(+), 65 deletions(-)
> > delete mode 100644 Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.txt
> > create mode 100644 Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
> > delete mode 100644 Documentation/devicetree/bindings/spi/spi-dw.txt
> >
> > diff --git a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.txt b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.txt
> > deleted file mode 100644
> > index 3ed08ee9feba..000000000000
> > --- a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.txt
> > +++ /dev/null
> > @@ -1,41 +0,0 @@
> > -Synopsys DesignWare AMBA 2.0 Synchronous Serial Interface.
> > -
> > -Required properties:
> > -- compatible : "snps,dw-apb-ssi" or "mscc,<soc>-spi", where soc is "ocelot" or
> > - "jaguar2", or "amazon,alpine-dw-apb-ssi"
> > -- reg : The register base for the controller. For "mscc,<soc>-spi", a second
> > - register set is required (named ICPU_CFG:SPI_MST)
> > -- interrupts : One interrupt, used by the controller.
> > -- #address-cells : <1>, as required by generic SPI binding.
> > -- #size-cells : <0>, also as required by generic SPI binding.
> > -- clocks : phandles for the clocks, see the description of clock-names below.
> > - The phandle for the "ssi_clk" is required. The phandle for the "pclk" clock
> > - is optional. If a single clock is specified but no clock-name, it is the
> > - "ssi_clk" clock. If both clocks are listed, the "ssi_clk" must be first.
> > -
> > -Optional properties:
> > -- clock-names : Contains the names of the clocks:
> > - "ssi_clk", for the core clock used to generate the external SPI clock.
> > - "pclk", the interface clock, required for register access. If a clock domain
> > - used to enable this clock then it should be named "pclk_clkdomain".
> > -- cs-gpios : Specifies the gpio pins to be used for chipselects.
> > -- num-cs : The number of chipselects. If omitted, this will default to 4.
> > -- reg-io-width : The I/O register width (in bytes) implemented by this
> > - device. Supported values are 2 or 4 (the default).
> > -
> > -Child nodes as per the generic SPI binding.
> > -
> > -Example:
> > -
> > - spi@fff00000 {
> > - compatible = "snps,dw-apb-ssi";
> > - reg = <0xfff00000 0x1000>;
> > - interrupts = <0 154 4>;
> > - #address-cells = <1>;
> > - #size-cells = <0>;
> > - clocks = <&spi_m_clk>;
> > - num-cs = <2>;
> > - cs-gpios = <&gpio0 13 0>,
> > - <&gpio0 14 0>;
> > - };
> > -
> > diff --git a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
> > new file mode 100644
> > index 000000000000..e2f6d8aa6181
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
> > @@ -0,0 +1,113 @@
> > +# SPDX-License-Identifier: GPL-2.0-only
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/spi/snps,dw-apb-ssi.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Synopsys DesignWare AMBA 2.0 Synchronous Serial Interface
> > +
> > +maintainers:
> > + - Mark Brown <broonie@kernel.org>
> > +
> > +allOf:
> > + - $ref: "spi-controller.yaml#"
> > + - if:
> > + properties:
> > + compatible:
> > + contains:
> > + enum:
> > + - mscc,ocelot-spi
> > + - mscc,jaguar2-spi
> > + then:
> > + properties:
> > + reg:
> > + minItems: 2
> > +
> > +properties:
> > + compatible:
> > + oneOf:
> > + - description: Generic DW SPI controller
> > + const: snps,dw-apb-ssi
> > + - description: Microsemi Ocelot/Jaguar2 SoC SPI controller
> > + items:
> > + - enum:
> > + - mscc,ocelot-spi
> > + - mscc,jaguar2-spi
> > + - const: snps,dw-apb-ssi
> > + - description: Amazon Alpine SPI controller
> > + const: amazon,alpine-dw-apb-ssi
> > + - description: Renesas RZ/N1 SPI controlle.
> > + items:
> > + - const: renesas,rzn1-spi
> > + - const: snps,dw-apb-ssi
> > +
> > + reg:
> > + minItems: 1
> > + items:
> > + - description: DW APB SSI controller memory mapped registers
> > + - description: SPI MST region map
> > +
> > + interrupts:
> > + maxItems: 1
> > +
> > + clocks:
> > + minItems: 1
> > + items:
> > + - description: SPI Controller reference clock source
> > + - description: APB interface clock source
> > +
> > + clock-names:
> > + minItems: 1
> > + items:
> > + - const: ssi_clk
> > + - const: pclk
> > +
> > + reg-io-width:
> > + $ref: /schemas/types.yaml#/definitions/uint32
> > + description: I/O register width (in bytes) implemented by this device
> > + default: 4
> > + enum: [ 2, 4 ]
> > +
> > + num-cs:
> > + default: 4
> > + minimum: 1
> > + maximum: 4
> > +
> > +patternProperties:
> > + "^.*@[0-9a-f]+$":
> > + type: object
> > + properties:
> > + reg:
> > + minimum: 0
> > + maximum: 3
> > +
> > + spi-rx-bus-width:
> > + const: 1
> > +
> > + spi-tx-bus-width:
> > + const: 1
> > +
> > +unevaluatedProperties: false
> > +
> > +required:
> > + - compatible
> > + - reg
> > + - "#address-cells"
> > + - "#size-cells"
> > + - interrupts
> > + - clocks
> > +
> > +examples:
> > + - |
> > + spi@fff00000 {
> > + compatible = "snps,dw-apb-ssi";
> > + reg = <0xfff00000 0x1000>;
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + interrupts = <0 154 4>;
> > + clocks = <&spi_m_clk>;
> > + num-cs = <2>;
> > + cs-gpios = <&gpio0 13 0>,
> > + <&gpio0 14 0>;
> > + };
> > +...
> > diff --git a/Documentation/devicetree/bindings/spi/spi-dw.txt b/Documentation/devicetree/bindings/spi/spi-dw.txt
> > deleted file mode 100644
> > index 7b63ed601990..000000000000
> > --- a/Documentation/devicetree/bindings/spi/spi-dw.txt
> > +++ /dev/null
> > @@ -1,24 +0,0 @@
> > -Synopsys DesignWare SPI master
> > -
> > -Required properties:
> > -- compatible: should be "snps,designware-spi"
> > -- #address-cells: see spi-bus.txt
> > -- #size-cells: see spi-bus.txt
> > -- reg: address and length of the spi master registers
> > -- interrupts: should contain one interrupt
> > -- clocks: spi clock phandle
> > -- num-cs: see spi-bus.txt
> > -
> > -Optional properties:
> > -- cs-gpios: see spi-bus.txt
> > -
> > -Example:
> > -
> > -spi: spi@4020a000 {
> > - compatible = "snps,designware-spi";
> > - interrupts = <11 1>;
> > - reg = <0x4020a000 0x1000>;
> > - clocks = <&pclk>;
> > - num-cs = <2>;
> > - cs-gpios = <&banka 0 0>;
> > -};
> > --
> > 2.25.1
> >
>
> --
> With Best Regards,
> Andy Shevchenko
>
>
next prev parent reply other threads:[~2020-05-12 20:28 UTC|newest]
Thread overview: 106+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-08 13:29 [PATCH 00/17] spi: dw: Add generic DW DMA controller support Serge Semin
2020-05-08 13:29 ` [PATCH 01/17] dt-bindings: spi: Convert DW SPI binding to DT schema Serge Semin
2020-05-08 19:39 ` Andy Shevchenko
2020-05-12 20:28 ` Serge Semin [this message]
2020-05-12 20:35 ` Andy Shevchenko
2020-05-08 13:29 ` [PATCH 02/17] dt-bindings: spi: dw: Add DMA properties bindings Serge Semin
2020-05-08 13:29 ` [PATCH 04/17] spi: dw: Cleanup generic DW DMA code namings Serge Semin
2020-05-08 19:43 ` Andy Shevchenko
2020-05-12 21:26 ` Serge Semin
2020-05-12 21:37 ` Andy Shevchenko
2020-05-08 13:29 ` [PATCH 06/17] spi: dw: Add DW SPI DMA/PCI/MMIO dependency on DW SPI core Serge Semin
2020-05-08 13:29 ` [PATCH 08/17] spi: dw: Clear DMAC register when done or stopped Serge Semin
2020-05-08 17:31 ` Mark Brown
2020-05-13 11:56 ` Serge Semin
2020-05-08 13:29 ` [PATCH 09/17] spi: dw: Enable interrupts in accordance with DMA xfer mode Serge Semin
2020-05-08 13:29 ` [PATCH 10/17] spi: dw: Parameterize the DMA Rx/Tx burst length Serge Semin
2020-05-08 13:29 ` [PATCH 12/17] spi: dw: Fix dma_slave_config used partly uninitialized Serge Semin
2020-05-08 19:20 ` Andy Shevchenko
2020-05-08 13:29 ` [PATCH 13/17] spi: dw: Initialize paddr in DW SPI MMIO private data Serge Semin
2020-05-08 19:21 ` Andy Shevchenko
2020-05-13 12:30 ` Serge Semin
2020-05-08 13:33 ` [PATCH 00/17] spi: dw: Add generic DW DMA controller support Mark Brown
2020-05-12 20:07 ` Serge Semin
2020-05-13 10:23 ` Mark Brown
2020-05-13 11:04 ` Serge Semin
2020-05-13 11:21 ` Mark Brown
2020-05-13 11:42 ` Serge Semin
[not found] ` <20200508132943.9826-8-Sergey.Semin@baikalelectronics.ru>
2020-05-08 17:30 ` [PATCH 07/17] spi: dw: Add Tx/Rx finish wait methods to DMA Mark Brown
[not found] ` <20200513113555.mjivjk374giopnea@mobilestation>
2020-05-13 11:36 ` Mark Brown
2020-05-08 17:36 ` [PATCH 00/17] spi: dw: Add generic DW DMA controller support Mark Brown
2020-05-08 19:16 ` Andy Shevchenko
2020-05-12 20:34 ` Serge Semin
2020-05-12 20:30 ` Serge Semin
[not found] ` <20200508132943.9826-15-Sergey.Semin@baikalelectronics.ru>
2020-05-08 19:23 ` [PATCH 14/17] spi: dw: Add DMA support to the DW SPI MMIO driver Andy Shevchenko
[not found] ` <20200508132943.9826-17-Sergey.Semin@baikalelectronics.ru>
2020-05-08 19:27 ` [PATCH 16/17] spi: dw: Fix Rx-only DMA transfers Andy Shevchenko
[not found] ` <20200508132943.9826-18-Sergey.Semin@baikalelectronics.ru>
2020-05-08 19:30 ` [PATCH 17/17] spi: dw: Use regset32 DebugFS method to create a registers file Andy Shevchenko
[not found] ` <20200513124422.z6ctlmvipwer45q4@mobilestation>
2020-05-13 14:41 ` Andy Shevchenko
2020-05-08 19:33 ` [PATCH 00/17] spi: dw: Add generic DW DMA controller support Andy Shevchenko
[not found] ` <20200508132943.9826-12-Sergey.Semin@baikalelectronics.ru>
2020-05-08 19:39 ` [PATCH 11/17] spi: dw: Fix native CS being unset Linus Walleij
[not found] ` <20200513001347.dyt357erev7vzy3l@mobilestation>
2020-05-14 8:31 ` Linus Walleij
[not found] ` <20200514115558.e6cqnuxqyqkysfn7@mobilestation>
2020-05-14 12:22 ` Andy Shevchenko
2020-05-14 13:03 ` Mark Brown
2020-05-14 14:35 ` Mark Brown
[not found] ` <20200508132943.9826-4-Sergey.Semin@baikalelectronics.ru>
2020-05-08 19:41 ` [PATCH 03/17] spi: dw: Split up the generic DMA code and Intel MID driver Andy Shevchenko
[not found] ` <20200508132943.9826-6-Sergey.Semin@baikalelectronics.ru>
2020-05-08 19:44 ` [PATCH 05/17] spi: dw: Discard static DW DMA slave structures Andy Shevchenko
2020-05-15 10:47 ` [PATCH v2 00/19] spi: dw: Add generic DW DMA controller support Serge Semin
2020-05-15 10:47 ` [PATCH v2 01/19] dt-bindings: spi: dw: Add Tx/Rx DMA properties Serge Semin
2020-05-15 11:51 ` Andy Shevchenko
2020-05-15 12:27 ` Mark Brown
2020-05-15 15:43 ` Serge Semin
2020-05-15 10:47 ` [PATCH v2 03/19] spi: dw: Clear DMAC register when done or stopped Serge Semin
2020-05-15 12:01 ` Andy Shevchenko
2020-05-15 16:42 ` Mark Brown
2020-05-15 17:21 ` Serge Semin
2020-05-15 10:47 ` [PATCH v2 05/19] spi: dw: Enable interrupts in accordance with DMA xfer mode Serge Semin
2020-05-15 12:27 ` Andy Shevchenko
2020-05-16 14:06 ` Serge Semin
2020-05-15 10:47 ` [PATCH v2 09/19] spi: dw: Parameterize the DMA Rx/Tx burst length Serge Semin
2020-05-15 14:01 ` Andy Shevchenko
[not found] ` <20200516143353.hw6nny5hbwgiyxfw@mobilestation>
2020-05-18 11:01 ` Andy Shevchenko
2020-05-18 12:41 ` Serge Semin
2020-05-15 10:47 ` [PATCH v2 10/19] spi: dw: Use DMA max burst to set the request thresholds Serge Semin
2020-05-15 14:38 ` Andy Shevchenko
[not found] ` <20200516200133.wmaqnfjbr7234fzo@mobilestation>
2020-05-18 11:03 ` Andy Shevchenko
2020-05-18 12:43 ` Mark Brown
2020-05-18 12:52 ` Serge Semin
2020-05-18 13:25 ` Andy Shevchenko
2020-05-18 13:43 ` Serge Semin
2020-05-18 14:48 ` Andy Shevchenko
2020-05-18 14:59 ` Serge Semin
2020-05-15 10:47 ` [PATCH v2 11/19] spi: dw: Initialize paddr in DW SPI MMIO private data Serge Semin
2020-05-15 14:39 ` Andy Shevchenko
2020-05-15 10:47 ` [PATCH v2 14/19] spi: dw: Remove DW DMA code dependency from DW_DMAC_PCI Serge Semin
2020-05-15 15:02 ` Andy Shevchenko
2020-05-15 10:47 ` [PATCH v2 15/19] spi: dw: Add DW SPI DMA/PCI/MMIO dependency on the DW SPI core Serge Semin
2020-05-15 15:03 ` Andy Shevchenko
2020-05-15 10:47 ` [PATCH v2 17/19] spi: dw: Add DMA support to the DW SPI MMIO driver Serge Semin
2020-05-15 15:08 ` Andy Shevchenko
2020-05-15 10:47 ` [PATCH v2 19/19] dt-bindings: spi: Convert DW SPI binding to DT schema Serge Semin
2020-05-16 20:59 ` Serge Semin
2020-05-15 11:49 ` [PATCH v2 00/19] spi: dw: Add generic DW DMA controller support Andy Shevchenko
2020-05-15 15:30 ` Serge Semin
[not found] ` <20200515104758.6934-3-Sergey.Semin@baikalelectronics.ru>
2020-05-15 12:01 ` [PATCH v2 02/19] spi: dw: Add Tx/Rx finish wait methods to the MID DMA Andy Shevchenko
2020-05-15 12:18 ` Mark Brown
2020-05-15 12:37 ` Andy Shevchenko
2020-05-15 12:41 ` Mark Brown
[not found] ` <20200515200250.zjsv5uaftwqcnwud@mobilestation>
2020-05-18 10:51 ` Mark Brown
[not found] ` <20200518110453.w3ko5a5yzwyr73ir@mobilestation>
2020-05-18 11:11 ` Mark Brown
[not found] ` <20200515194058.pmpd4wa7lw2dle3g@mobilestation>
2020-05-18 10:55 ` Andy Shevchenko
[not found] ` <20200515104758.6934-5-Sergey.Semin@baikalelectronics.ru>
2020-05-15 12:05 ` [PATCH v2 04/19] spi: dw: Fix native CS being unset Andy Shevchenko
[not found] ` <20200515104758.6934-7-Sergey.Semin@baikalelectronics.ru>
2020-05-15 12:34 ` [PATCH v2 06/19] spi: dw: Discard static DW DMA slave structures Andy Shevchenko
[not found] ` <20200516142030.kburieaxjg4n7c42@mobilestation>
2020-05-18 11:00 ` Andy Shevchenko
2020-05-18 11:38 ` Andy Shevchenko
[not found] ` <20200518123242.xoosc4pcj7heo4he@mobilestation>
2020-05-18 13:22 ` Andy Shevchenko
[not found] ` <20200515104758.6934-8-Sergey.Semin@baikalelectronics.ru>
2020-05-15 12:38 ` [PATCH v2 07/19] spi: dw: Discard unused void priv pointer Andy Shevchenko
[not found] ` <20200515104758.6934-9-Sergey.Semin@baikalelectronics.ru>
2020-05-15 13:03 ` [PATCH v2 08/19] spi: dw: Discard dma_width member of the dw_spi structure Andy Shevchenko
[not found] ` <20200515130559.psq2zwfhovt6rzhl@mobilestation>
2020-05-15 13:49 ` Andy Shevchenko
[not found] ` <20200515141627.pqdaic6wksatusl6@mobilestation>
2020-05-15 15:00 ` Andy Shevchenko
[not found] ` <20200515104758.6934-13-Sergey.Semin@baikalelectronics.ru>
2020-05-15 14:40 ` [PATCH v2 12/19] spi: dw: Fix Rx-only DMA transfers Andy Shevchenko
2020-05-15 16:55 ` Mark Brown
[not found] ` <20200515104758.6934-14-Sergey.Semin@baikalelectronics.ru>
2020-05-15 14:51 ` [PATCH v2 13/19] spi: dw: Move Non-DMA code to the DW PCIe-SPI driver Andy Shevchenko
[not found] ` <20200516201724.7q5uhxmzpr6xjooj@mobilestation>
[not found] ` <20200518125850.jnhaqlr2ticu3ivs@mobilestation>
2020-05-18 13:00 ` Mark Brown
[not found] ` <20200515104758.6934-19-Sergey.Semin@baikalelectronics.ru>
2020-05-15 15:10 ` [PATCH v2 18/19] spi: dw: Use regset32 DebugFS method to create regdump file Andy Shevchenko
[not found] ` <20200516204634.td52orxfnh7iewg6@mobilestation>
2020-05-18 11:18 ` Andy Shevchenko
[not found] ` <20200518140825.jnkfpybxnwq7fx2m@mobilestation>
2020-05-18 15:06 ` Andy Shevchenko
2020-05-15 18:21 ` [PATCH v2 00/19] spi: dw: Add generic DW DMA controller support Mark Brown
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