* [PATCH] dt-bindings: clock: Add YAML schemas for QCOM A53 PLL
@ 2020-05-04 6:30 Sivaprakash Murugesan
2020-05-12 22:48 ` Rob Herring
2020-05-27 2:41 ` Stephen Boyd
0 siblings, 2 replies; 3+ messages in thread
From: Sivaprakash Murugesan @ 2020-05-04 6:30 UTC (permalink / raw)
To: agross, bjorn.andersson, mturquette, sboyd, robh+dt,
linux-arm-msm, linux-clk, devicetree, linux-kernel
Cc: Sivaprakash Murugesan
This patch adds schema for primary CPU PLL found on few Qualcomm
platforms.
Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org>
---
.../devicetree/bindings/clock/qcom,a53pll.txt | 22 ------------
.../devicetree/bindings/clock/qcom,a53pll.yaml | 40 ++++++++++++++++++++++
2 files changed, 40 insertions(+), 22 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/clock/qcom,a53pll.txt
create mode 100644 Documentation/devicetree/bindings/clock/qcom,a53pll.yaml
diff --git a/Documentation/devicetree/bindings/clock/qcom,a53pll.txt b/Documentation/devicetree/bindings/clock/qcom,a53pll.txt
deleted file mode 100644
index e3fa811..0000000
--- a/Documentation/devicetree/bindings/clock/qcom,a53pll.txt
+++ /dev/null
@@ -1,22 +0,0 @@
-Qualcomm MSM8916 A53 PLL Binding
---------------------------------
-The A53 PLL on MSM8916 platforms is the main CPU PLL used used for frequencies
-above 1GHz.
-
-Required properties :
-- compatible : Shall contain only one of the following:
-
- "qcom,msm8916-a53pll"
-
-- reg : shall contain base register location and length
-
-- #clock-cells : must be set to <0>
-
-Example:
-
- a53pll: clock@b016000 {
- compatible = "qcom,msm8916-a53pll";
- reg = <0xb016000 0x40>;
- #clock-cells = <0>;
- };
-
diff --git a/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml b/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml
new file mode 100644
index 0000000..20d2638
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml
@@ -0,0 +1,40 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/qcom,a53pll.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm A53 PLL Binding
+
+maintainers:
+ - Sivaprakash Murugesan <sivaprak@codeaurora.org>
+
+description:
+ The A53 PLL on few Qualcomm platforms is the main CPU PLL used used for
+ frequencies above 1GHz.
+
+properties:
+ compatible:
+ const: qcom,msm8916-a53pll
+
+ reg:
+ maxItems: 1
+
+ '#clock-cells':
+ const: 0
+
+required:
+ - compatible
+ - reg
+ - '#clock-cells'
+
+additionalProperties: false
+
+examples:
+ #Example 1 - A53 PLL found on MSM8916 devices
+ - |
+ a53pll: clock@b016000 {
+ compatible = "qcom,msm8916-a53pll";
+ reg = <0xb016000 0x40>;
+ #clock-cells = <0>;
+ };
--
2.7.4
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] dt-bindings: clock: Add YAML schemas for QCOM A53 PLL
2020-05-04 6:30 [PATCH] dt-bindings: clock: Add YAML schemas for QCOM A53 PLL Sivaprakash Murugesan
@ 2020-05-12 22:48 ` Rob Herring
2020-05-27 2:41 ` Stephen Boyd
1 sibling, 0 replies; 3+ messages in thread
From: Rob Herring @ 2020-05-12 22:48 UTC (permalink / raw)
To: Sivaprakash Murugesan
Cc: sboyd, robh+dt, linux-clk, linux-kernel, linux-arm-msm,
mturquette, devicetree, agross, bjorn.andersson
On Mon, 4 May 2020 12:00:03 +0530, Sivaprakash Murugesan wrote:
> This patch adds schema for primary CPU PLL found on few Qualcomm
> platforms.
>
> Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org>
> ---
> .../devicetree/bindings/clock/qcom,a53pll.txt | 22 ------------
> .../devicetree/bindings/clock/qcom,a53pll.yaml | 40 ++++++++++++++++++++++
> 2 files changed, 40 insertions(+), 22 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/clock/qcom,a53pll.txt
> create mode 100644 Documentation/devicetree/bindings/clock/qcom,a53pll.yaml
>
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] dt-bindings: clock: Add YAML schemas for QCOM A53 PLL
2020-05-04 6:30 [PATCH] dt-bindings: clock: Add YAML schemas for QCOM A53 PLL Sivaprakash Murugesan
2020-05-12 22:48 ` Rob Herring
@ 2020-05-27 2:41 ` Stephen Boyd
1 sibling, 0 replies; 3+ messages in thread
From: Stephen Boyd @ 2020-05-27 2:41 UTC (permalink / raw)
To: Sivaprakash Murugesan, agross, bjorn.andersson, devicetree,
linux-arm-msm, linux-clk, linux-kernel, mturquette, robh+dt
Cc: Sivaprakash Murugesan
Quoting Sivaprakash Murugesan (2020-05-03 23:30:03)
> This patch adds schema for primary CPU PLL found on few Qualcomm
> platforms.
>
> Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org>
> ---
Applied to clk-next
^ permalink raw reply [flat|nested] 3+ messages in thread
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2020-05-04 6:30 [PATCH] dt-bindings: clock: Add YAML schemas for QCOM A53 PLL Sivaprakash Murugesan
2020-05-12 22:48 ` Rob Herring
2020-05-27 2:41 ` Stephen Boyd
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