Re: [PATCH v9 2/5] PCI: Add Loongson PCI Controller support

From: Bjorn Helgaas <helgaas@kernel.org>
To: Jiaxun Yang <jiaxun.yang@flygoat.com>
Cc: linux-pci@vger.kernel.org, Rob Herring <robh@kernel.org>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Rob Herring <robh+dt@kernel.org>,
	Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
	Huacai Chen <chenhc@lemote.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Paul Burton <paulburton@kernel.org>,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-mips@vger.kernel.org
Subject: Re: [PATCH v9 2/5] PCI: Add Loongson PCI Controller support
Date: Wed, 13 May 2020 10:05:18 -0500	[thread overview]
Message-ID: <20200513150518.GA321047@bjorn-Precision-5520> (raw)
In-Reply-To: <08C2301A-7349-4044-80F4-0B0520780DB9@flygoat.com>

On Wed, May 13, 2020 at 09:20:08AM +0800, Jiaxun Yang wrote:
> 于 2020年5月13日 GMT+08:00 上午2:06:02, Bjorn Helgaas <helgaas@kernel.org> 写到:
> >On Tue, May 12, 2020 at 03:43:56PM +0800, Jiaxun Yang wrote:
> >> This controller can be found on Loongson-2K SoC, Loongson-3
> >> systems with RS780E/LS7A PCH.
> >> 
> >> The RS780E part of code was previously located at
> >> arch/mips/pci/ops-loongson3.c and now it can use generic PCI
> >> driver implementation.
> >> 
> >> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
> >> Reviewed-by: Rob Herring <robh@kernel.org>
> >
> >> +static void system_bus_quirk(struct pci_dev *pdev)
> >> +{
> >> +	u16 tmp;
> >> +
> >> +	/* 
> >> +	 * These devices are not sharing resouces with rest of devices
> >> +	 * on host bus and firmware will ensure their BARs are placed
> >> +	 * in safe ranges. Also there might be some config registers
> >> +	 * in their config space so kernel shouldn't ignore them.
> >
> >"Firmware ensuring BARs are placed in 'safe' ranges" is not a
> >sufficient answer.  As I said before, Linux needs to know both the
> >ADDRESS and the SIZE of whatever non-standard BARs these are.
> >Otherwise, we're liable to assign that space to a different device.
> 
> The address assigned to these devices will never be a part of resources
> belongs to the host bridge. That's enforced by hardware and firmware,
> so address conflict would never happen.
> 
> I'm doing like this to ensure kernel will discover this device but do nothing
> about assignment of resources to it.

OK, that's really ugly, but I guess we can't do anything about it.  It
would be helpful to make the comment say something like:

  The address space consumed by these devices is outside the resources
  of the host bridge.

Side note: in ACPI systems, the ACPI namespace is supposed to describe
all resources consumed by all devices.  Does DT have a similar
expectation?  Is there something in DT that tells us about the address
space used by these devices?  Even if that space never overlaps with
the PCI host bridge apertures, it might be useful to show the space in
/proc/iomem and similar places.

Bjorn