From: Bjorn Andersson <bjorn.andersson@linaro.org>
To: Rajendra Nayak <rnayak@codeaurora.org>
Cc: viresh.kumar@linaro.org, sboyd@kernel.org, agross@kernel.org,
linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
mka@chromium.org, Mark Brown <broonie@kernel.org>,
Alok Chauhan <alokc@codeaurora.org>,
Akash Asthana <akashast@codeaurora.org>,
linux-spi@vger.kernel.org
Subject: Re: [PATCH v5 2/6] spi: spi-geni-qcom: Use OPP API to set clk/perf state
Date: Wed, 13 May 2020 12:07:52 -0700 [thread overview]
Message-ID: <20200513190752.GS2165@builder.lan> (raw)
In-Reply-To: <1589368382-19607-3-git-send-email-rnayak@codeaurora.org>
On Wed 13 May 04:12 PDT 2020, Rajendra Nayak wrote:
> geni spi needs to express a perforamnce state requirement on CX
> depending on the frequency of the clock rates. Use OPP table from
> DT to register with OPP framework and use dev_pm_opp_set_rate() to
> set the clk/perf state.
>
> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
> Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
> Cc: Mark Brown <broonie@kernel.org>
> Cc: Alok Chauhan <alokc@codeaurora.org>
> Cc: Akash Asthana <akashast@codeaurora.org>
> Cc: linux-spi@vger.kernel.org
> ---
> This patch will need to land via the msm tree because of a dependency
> with another change.
> Change in v5: OPP cleanup done as the last thing in spi_geni_remove()
>
> drivers/spi/spi-geni-qcom.c | 26 +++++++++++++++++++++++---
> 1 file changed, 23 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/spi/spi-geni-qcom.c b/drivers/spi/spi-geni-qcom.c
> index c397242..0d7ead1 100644
> --- a/drivers/spi/spi-geni-qcom.c
> +++ b/drivers/spi/spi-geni-qcom.c
> @@ -7,6 +7,7 @@
> #include <linux/log2.h>
> #include <linux/module.h>
> #include <linux/platform_device.h>
> +#include <linux/pm_opp.h>
> #include <linux/pm_runtime.h>
> #include <linux/qcom-geni-se.h>
> #include <linux/spi/spi.h>
> @@ -95,7 +96,6 @@ static int get_spi_clk_cfg(unsigned int speed_hz,
> {
> unsigned long sclk_freq;
> unsigned int actual_hz;
> - struct geni_se *se = &mas->se;
> int ret;
>
> ret = geni_se_clk_freq_match(&mas->se,
> @@ -112,9 +112,9 @@ static int get_spi_clk_cfg(unsigned int speed_hz,
>
> dev_dbg(mas->dev, "req %u=>%u sclk %lu, idx %d, div %d\n", speed_hz,
> actual_hz, sclk_freq, *clk_idx, *clk_div);
> - ret = clk_set_rate(se->clk, sclk_freq);
> + ret = dev_pm_opp_set_rate(mas->dev, sclk_freq);
> if (ret)
> - dev_err(mas->dev, "clk_set_rate failed %d\n", ret);
> + dev_err(mas->dev, "dev_pm_opp_set_rate failed %d\n", ret);
> return ret;
> }
>
> @@ -561,6 +561,17 @@ static int spi_geni_probe(struct platform_device *pdev)
> mas->se.wrapper = dev_get_drvdata(dev->parent);
> mas->se.base = base;
> mas->se.clk = clk;
> + mas->se.opp_table = dev_pm_opp_set_clkname(&pdev->dev, "se");
> + if (IS_ERR(mas->se.opp_table))
> + return PTR_ERR(mas->se.opp_table);
> + /* OPP table is optional */
> + ret = dev_pm_opp_of_add_table(&pdev->dev);
> + if (!ret) {
> + mas->se.has_opp_table = true;
> + } else if (ret != -ENODEV) {
> + dev_err(&pdev->dev, "invalid OPP table in device tree\n");
> + return ret;
> + }
>
> spi->bus_num = -1;
> spi->dev.of_node = dev->of_node;
> @@ -596,6 +607,9 @@ static int spi_geni_probe(struct platform_device *pdev)
> spi_geni_probe_runtime_disable:
> pm_runtime_disable(dev);
> spi_master_put(spi);
> + if (mas->se.has_opp_table)
Why do you need has_opp_table?
Afaict if dev_pm_opp_of_add_table() returns -ENODEV there's no attached
opp-table and dev_pm_opp_of_remove_table() is a nop.
Regards,
Bjorn
> + dev_pm_opp_of_remove_table(&pdev->dev);
> + dev_pm_opp_put_clkname(mas->se.opp_table);
> return ret;
> }
>
> @@ -609,6 +623,9 @@ static int spi_geni_remove(struct platform_device *pdev)
>
> free_irq(mas->irq, spi);
> pm_runtime_disable(&pdev->dev);
> + if (mas->se.has_opp_table)
> + dev_pm_opp_of_remove_table(&pdev->dev);
> + dev_pm_opp_put_clkname(mas->se.opp_table);
> return 0;
> }
>
> @@ -617,6 +634,9 @@ static int __maybe_unused spi_geni_runtime_suspend(struct device *dev)
> struct spi_master *spi = dev_get_drvdata(dev);
> struct spi_geni_master *mas = spi_master_get_devdata(spi);
>
> + /* Drop the performance state vote */
> + dev_pm_opp_set_rate(dev, 0);
> +
> return geni_se_resources_off(&mas->se);
> }
>
> --
> QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
> of Code Aurora Forum, hosted by The Linux Foundation
next prev parent reply other threads:[~2020-05-13 19:09 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-13 11:12 [PATCH v5 0/6] DVFS for IO devices on sdm845 and sc7180 Rajendra Nayak
2020-05-13 11:12 ` [PATCH v5 1/6] tty: serial: qcom_geni_serial: Use OPP API to set clk/perf state Rajendra Nayak
2020-05-13 11:12 ` [PATCH v5 2/6] spi: spi-geni-qcom: " Rajendra Nayak
2020-05-13 19:07 ` Bjorn Andersson [this message]
2020-05-14 5:03 ` Rajendra Nayak
2020-05-14 5:38 ` Bjorn Andersson
2020-05-26 10:39 ` Mark Brown
2020-05-13 11:12 ` [PATCH v5 3/6] drm/msm/dpu: " Rajendra Nayak
2020-05-13 11:13 ` [PATCH v5 4/6] drm/msm: dsi: " Rajendra Nayak
2020-05-13 11:13 ` [PATCH v5 5/6] media: venus: core: Add support for opp tables/perf voting Rajendra Nayak
2020-05-13 18:41 ` Matthias Kaehlcke
2020-05-13 11:13 ` [PATCH v5 6/6] spi: spi-qcom-qspi: Use OPP API to set clk/perf state Rajendra Nayak
2020-05-13 18:52 ` Matthias Kaehlcke
2020-05-26 10:39 ` Mark Brown
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