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From: <Tudor.Ambarus@microchip.com>
To: <alexandre.belloni@bootlin.com>,
	<Ludovic.Desroches@microchip.com>, <Nicolas.Ferre@microchip.com>
Cc: <robh+dt@kernel.org>, <devicetree@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <Codrin.Ciubotariu@microchip.com>,
	<Tudor.Ambarus@microchip.com>
Subject: [PATCH 12/16] ARM: dts: at91: sama5d2: Add missing flexcom definitions
Date: Thu, 14 May 2020 05:03:15 +0000	[thread overview]
Message-ID: <20200514050301.147442-13-tudor.ambarus@microchip.com> (raw)
In-Reply-To: <20200514050301.147442-1-tudor.ambarus@microchip.com>

From: Tudor Ambarus <tudor.ambarus@microchip.com>

Describe all the flexcom functions for all the flexcom nodes.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
---
 arch/arm/boot/dts/sama5d2.dtsi | 79 ++++++++++++++++++++++++++++++++++
 1 file changed, 79 insertions(+)

diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index 5bba8024f485..b8cdeedee6bc 100644
--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -723,6 +723,25 @@
 					status = "disabled";
 				};
 
+				spi3: spi@400 {
+					compatible = "atmel,at91rm9200-spi";
+					reg = <0x400 0x200>;
+					interrupts = <20 IRQ_TYPE_LEVEL_HIGH 7>;
+					clocks = <&pmc PMC_TYPE_PERIPHERAL 20>;
+					clock-names = "spi_clk";
+					dmas = <&dma0
+						(AT91_XDMAC_DT_MEM_IF(0) |
+						 AT91_XDMAC_DT_PER_IF(1) |
+						 AT91_XDMAC_DT_PERID(13))>,
+					       <&dma0
+						(AT91_XDMAC_DT_MEM_IF(0) |
+						 AT91_XDMAC_DT_PER_IF(1) |
+						 AT91_XDMAC_DT_PERID(14))>;
+					dma-names = "tx", "rx";
+					atmel,fifo-size = <16>;
+					status = "disabled";
+				};
+
 				i2c3: i2c@600 {
 					compatible = "atmel,sama5d2-i2c";
 					reg = <0x600 0x200>;
@@ -910,6 +929,45 @@
 					atmel,fifo-size = <32>;
 					status = "disabled";
 				};
+
+				spi4: spi@400 {
+					compatible = "atmel,at91rm9200-spi";
+					reg = <0x400 0x200>;
+					interrupts = <21 IRQ_TYPE_LEVEL_HIGH 7>;
+					clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
+					clock-names = "spi_clk";
+					dmas = <&dma0
+						(AT91_XDMAC_DT_MEM_IF(0) |
+						 AT91_XDMAC_DT_PER_IF(1) |
+						 AT91_XDMAC_DT_PERID(15))>,
+						<&dma0
+						(AT91_XDMAC_DT_MEM_IF(0) |
+						 AT91_XDMAC_DT_PER_IF(1) |
+						 AT91_XDMAC_DT_PERID(16))>;
+					dma-names = "tx", "rx";
+					atmel,fifo-size = <16>;
+					status = "disabled";
+				};
+
+				i2c4: i2c@600 {
+					compatible = "atmel,sama5d2-i2c";
+					reg = <0x600 0x200>;
+					interrupts = <21 IRQ_TYPE_LEVEL_HIGH 7>;
+					#address-cells = <1>;
+					#size-cells = <0>;
+					clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
+					dmas = <&dma0
+						(AT91_XDMAC_DT_MEM_IF(0) |
+						 AT91_XDMAC_DT_PER_IF(1) |
+						 AT91_XDMAC_DT_PERID(15))>,
+						<&dma0
+						(AT91_XDMAC_DT_MEM_IF(0) |
+						 AT91_XDMAC_DT_PER_IF(1) |
+						 AT91_XDMAC_DT_PERID(16))>;
+					dma-names = "tx", "rx";
+					atmel,fifo-size = <16>;
+					status = "disabled";
+				};
 			};
 
 			flx3: flexcom@fc014000 {
@@ -958,6 +1016,27 @@
 					atmel,fifo-size = <16>;
 					status = "disabled";
 				};
+
+				i2c5: i2c@600 {
+					compatible = "atmel,sama5d2-i2c";
+					reg = <0x600 0x200>;
+					interrupts = <22 IRQ_TYPE_LEVEL_HIGH 7>;
+					#address-cells = <1>;
+					#size-cells = <0>;
+					clocks = <&pmc PMC_TYPE_PERIPHERAL 22>;
+					dmas = <&dma0
+						(AT91_XDMAC_DT_MEM_IF(0) |
+						 AT91_XDMAC_DT_PER_IF(1) |
+						 AT91_XDMAC_DT_PERID(17))>,
+					       <&dma0
+						(AT91_XDMAC_DT_MEM_IF(0) |
+						 AT91_XDMAC_DT_PER_IF(1) |
+						 AT91_XDMAC_DT_PERID(18))>;
+					dma-names = "tx", "rx";
+					atmel,fifo-size = <16>;
+					status = "disabled";
+				};
+
 			};
 
 			flx4: flexcom@fc018000 {
-- 
2.23.0

  parent reply	other threads:[~2020-05-14  5:03 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-14  5:03 [PATCH 00/16] ARM: dts: at91: sama5d2: Rework Flexcom definitions Tudor.Ambarus
2020-05-14  5:03 ` [PATCH 01/16] ARM: dts: at91: sama5d2: Fix the label numbering for flexcom functions Tudor.Ambarus
2020-05-14  5:03 ` [PATCH 02/16] ARM: dts: at91: sama5d2: Move flx4 definitions in the SoC dtsi Tudor.Ambarus
2020-05-14  5:03 ` [PATCH 03/16] ARM: dts: at91: sama5d2: Move flx3 " Tudor.Ambarus
2020-05-14  5:03 ` [PATCH 04/16] ARM: dts: at91: sama5d2: Move flx2 " Tudor.Ambarus
2020-05-14  5:03 ` [PATCH 05/16] ARM: dts: at91: sama5d2: Move flx1 " Tudor.Ambarus
2020-05-14  5:03 ` [PATCH 06/16] ARM: dts: at91: sama5d2: Move flx0 " Tudor.Ambarus
2020-05-14  5:03 ` [PATCH 07/16] ARM: dts: at91: sama5d2: Specify the FIFO size for the Flexcom UART Tudor.Ambarus
2020-05-14  5:03 ` [PATCH 09/16] ARM: dts: at91: sama5d2: Add DMA bindings for the flx3 SPI function Tudor.Ambarus
2020-05-14  5:03 ` [PATCH 08/16] ARM: dts: at91: sama5d2: Add DMA bindings for the SPI and UART flx4 functions Tudor.Ambarus
2020-05-14  5:03 ` [PATCH 10/16] ARM: dts: at91: sama5d2: Add DMA bindings for the flx1 I2C function Tudor.Ambarus
2020-05-14  5:03 ` [PATCH 11/16] ARM: dts: at91: sama5d2: Add DMA bindings for the SPI and I2C flx0 functions Tudor.Ambarus
2020-05-14  5:03 ` [PATCH 13/16] ARM: dts: at91: sama5d2: Remove i2s and tcb aliases from SoC dtsi Tudor.Ambarus
2020-05-14  5:03 ` Tudor.Ambarus [this message]
2020-05-14  5:03 ` [PATCH 14/16] ARM: dts: at91: sama5d2_xplained: Add alias for DBGU Tudor.Ambarus
2020-05-14  5:03 ` [PATCH 16/16] ARM: dts: at91: sama5d2_ptc_ek: Add comments to describe the aliases Tudor.Ambarus
2020-05-14  5:03 ` [PATCH 15/16] ARM: dts: at91: sama5d2_xplained: Describe the flx0 I2C function Tudor.Ambarus
2020-05-15 14:51 ` [PATCH 00/16] ARM: dts: at91: sama5d2: Rework Flexcom definitions Alexandre Belloni

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