From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 62C1DC433E2 for ; Fri, 15 May 2020 12:27:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 462A620709 for ; Fri, 15 May 2020 12:27:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726199AbgEOM1E (ORCPT ); Fri, 15 May 2020 08:27:04 -0400 Received: from mga02.intel.com ([134.134.136.20]:40579 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726139AbgEOM1D (ORCPT ); Fri, 15 May 2020 08:27:03 -0400 IronPort-SDR: flDwKY2DWv+i+mlTCT3Az2dSlh4eBlkJLH1GkE1pM7Br0bR4FDmOjSLZz1RuxbvVQ0dILVnpqW nuQ/V8sn1Kig== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 May 2020 05:27:02 -0700 IronPort-SDR: wJORXsmnW7wF7NWU+mlHtKfhqd/8eoCv4nbBmAKprDpHBHY8vdrxEH5ZNSH6bW46w2gGCXFmfp JrYP2WY3DncA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.73,395,1583222400"; d="scan'208";a="298423782" Received: from smile.fi.intel.com (HELO smile) ([10.237.68.40]) by fmsmga002.fm.intel.com with ESMTP; 15 May 2020 05:26:58 -0700 Received: from andy by smile with local (Exim 4.93) (envelope-from ) id 1jZZQa-006r78-F8; Fri, 15 May 2020 15:27:00 +0300 Date: Fri, 15 May 2020 15:27:00 +0300 From: Andy Shevchenko To: Serge Semin Cc: Mark Brown , Serge Semin , Georgy Vlasov , Ramil Zaripov , Alexey Malahov , Thomas Bogendoerfer , Paul Burton , Ralf Baechle , Arnd Bergmann , Allison Randal , Gareth Williams , Rob Herring , linux-mips@vger.kernel.org, devicetree@vger.kernel.org, Jarkko Nikula , Thomas Gleixner , Wan Ahmad Zainie , linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 05/19] spi: dw: Enable interrupts in accordance with DMA xfer mode Message-ID: <20200515122700.GY185537@smile.fi.intel.com> References: <20200508132943.9826-1-Sergey.Semin@baikalelectronics.ru> <20200515104758.6934-1-Sergey.Semin@baikalelectronics.ru> <20200515104758.6934-6-Sergey.Semin@baikalelectronics.ru> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200515104758.6934-6-Sergey.Semin@baikalelectronics.ru> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, May 15, 2020 at 01:47:44PM +0300, Serge Semin wrote: > It's pointless to track the Tx overrun interrupts if Rx-only SPI > transfer is issued. Similarly there is no need in handling the Rx > overrun/underrun interrupts if Tx-only SPI transfer is executed. > So lets unmask the interrupts only if corresponding SPI > transactions are implied. My comments below. > Co-developed-by: Georgy Vlasov > Signed-off-by: Georgy Vlasov > Signed-off-by: Serge Semin > Cc: Ramil Zaripov > Cc: Alexey Malahov > Cc: Thomas Bogendoerfer > Cc: Paul Burton > Cc: Ralf Baechle > Cc: Arnd Bergmann > Cc: Allison Randal > Cc: Andy Shevchenko > Cc: Gareth Williams > Cc: Rob Herring > Cc: linux-mips@vger.kernel.org > Cc: devicetree@vger.kernel.org I think you really need to revisit Cc list in all patches (DT people hardly interested in this one, though ones where properties are being used might be point of interest). ... > /* Set the interrupt mask */ > - spi_umask_intr(dws, SPI_INT_TXOI | SPI_INT_RXUI | SPI_INT_RXOI); > + spi_umask_intr(dws, imr); Can we rather do like this /* Set the interrupt mask */ if (xfer->tx_buf) imr |= SPI_INT_TXOI; if (xfer->rx_buf) imr |= SPI_INT_RXUI | SPI_INT_RXOI; spi_umask_intr(dws, imr); ? (First block sets DMA, second one IRQ) -- With Best Regards, Andy Shevchenko