From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 75C38C433E1 for ; Tue, 19 May 2020 08:05:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 54118207D8 for ; Tue, 19 May 2020 08:05:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728607AbgESIFX (ORCPT ); Tue, 19 May 2020 04:05:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53200 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728237AbgESIFX (ORCPT ); Tue, 19 May 2020 04:05:23 -0400 Received: from andre.telenet-ops.be (andre.telenet-ops.be [IPv6:2a02:1800:120:4::f00:15]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0FD9CC05BD09 for ; Tue, 19 May 2020 01:05:22 -0700 (PDT) Received: from ramsan ([IPv6:2a02:1810:ac12:ed60:918e:b928:22c1:d715]) by andre.telenet-ops.be with bizsmtp id gY5M2200B4CPMDc01Y5Mac; Tue, 19 May 2020 10:05:21 +0200 Received: from rox.of.borg ([192.168.97.57]) by ramsan with esmtp (Exim 4.90_1) (envelope-from ) id 1jaxFZ-0000Ye-Bi; Tue, 19 May 2020 10:05:21 +0200 Received: from geert by rox.of.borg with local (Exim 4.90_1) (envelope-from ) id 1jaxFZ-0007Nn-9P; Tue, 19 May 2020 10:05:21 +0200 From: Geert Uytterhoeven To: Thomas Gleixner , Jason Cooper , Marc Zyngier , Rob Herring , Andre Przywara Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-renesas-soc@vger.kernel.org, linux-kernel@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH] dt-bindings: interrupt-controller: arm,gic: Document resets property Date: Tue, 19 May 2020 10:05:19 +0200 Message-Id: <20200519080519.28324-1-geert+renesas@glider.be> X-Mailer: git-send-email 2.17.1 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org A generic GIC block embedded in an SoC may be connected to an on-SoC reset controller. Hence allow the DTS writer to describe this relation, by documenting the optional presence of a "reset" property. This gets rid of "make dtbs_check" warnings like: arch/arm/boot/dts/r8a7791-porter.dt.yaml: interrupt-controller@f1001000: 'resets' does not match any of the regexes: '^v2m@[0-9a-f]+$', 'pinctrl-[0-9]+' Signed-off-by: Geert Uytterhoeven --- .../devicetree/bindings/interrupt-controller/arm,gic.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml b/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml index 9a47820ef34649dd..caefcc50bcf92c92 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml @@ -125,6 +125,9 @@ properties: power-domains: maxItems: 1 + resets: + maxItems: 1 + required: - compatible - reg -- 2.17.1