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[156.34.48.30]) by smtp.gmail.com with ESMTPSA id m59sm1124723qtd.46.2020.05.19.17.24.30 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 19 May 2020 17:24:30 -0700 (PDT) Received: from jgg by mlx.ziepe.ca with local (Exim 4.90_1) (envelope-from ) id 1jbCX8-0003W3-0k; Tue, 19 May 2020 21:24:30 -0300 Date: Tue, 19 May 2020 21:24:30 -0300 From: Jason Gunthorpe To: Alex Williamson Cc: Peter Xu , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, cohuck@redhat.com Subject: Re: [PATCH 0/2] vfio/type1/pci: IOMMU PFNMAP invalidation Message-ID: <20200520002429.GE31189@ziepe.ca> References: <158947414729.12590.4345248265094886807.stgit@gimli.home> <20200514212538.GB449815@xz-x1> <20200514161712.14b34984@w520.home> <20200514222415.GA24575@ziepe.ca> <20200514165517.3df5a9ef@w520.home> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200514165517.3df5a9ef@w520.home> User-Agent: Mutt/1.9.4 (2018-02-28) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, May 14, 2020 at 04:55:17PM -0600, Alex Williamson wrote: > On Thu, 14 May 2020 19:24:15 -0300 > Jason Gunthorpe wrote: > > > On Thu, May 14, 2020 at 04:17:12PM -0600, Alex Williamson wrote: > > > > > that much. I think this would also address Jason's primary concern. > > > It's better to get an IOMMU fault from the user trying to access those > > > mappings than it is to leave them in place. > > > > Yes, there are few options here - if the pages are available for use > > by the IOMMU and *asynchronously* someone else revokes them, then the > > only way to protect the kernel is to block them from the IOMMUU. > > > > For this to be sane the revokation must be under complete control of > > the VFIO user. ie if a user decides to disable MMIO traffic then of > > course the IOMMU should block P2P transfer to the MMIO bar. It is user > > error to have not disabled those transfers in the first place. > > > > When this is all done inside a guest the whole logic applies. On bare > > metal you might get some AER or crash or MCE. In virtualization you'll > > get an IOMMU fault. > > > > > due to the memory enable bit. If we could remap the range to a kernel > > > page we could maybe avoid the IOMMU fault and maybe even have a crude > > > test for whether any data was written to the page while that mapping > > > was in place (ie. simulating more restricted error handling, though > > > more asynchronous than done at the platform level). > > > > I'm not if this makes sense, can't we arrange to directly trap the > > IOMMU failure and route it into qemu if that is what is desired? > > Can't guarantee it, some systems wire that directly into their > management processor so that they can "protect their users" regardless > of whether they want or need it. Yay firmware first error handling, > *sigh*. Thanks, I feel like those system should just loose the ability to reliably mirror IOMMU errors to their guests - trying to emulate it by scanning memory/etc sounds too horrible. Jason