From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1E230C433DF for ; Fri, 22 May 2020 07:31:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E2833206DD for ; Fri, 22 May 2020 07:31:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728881AbgEVHbN (ORCPT ); Fri, 22 May 2020 03:31:13 -0400 Received: from elvis.franken.de ([193.175.24.41]:34164 "EHLO elvis.franken.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728493AbgEVHbG (ORCPT ); Fri, 22 May 2020 03:31:06 -0400 Received: from uucp (helo=alpha) by elvis.franken.de with local-bsmtp (Exim 3.36 #1) id 1jc28x-0003HE-04; Fri, 22 May 2020 09:30:59 +0200 Received: by alpha.franken.de (Postfix, from userid 1000) id 7E62FC015D; Fri, 22 May 2020 09:28:55 +0200 (CEST) Date: Fri, 22 May 2020 09:28:55 +0200 From: Thomas Bogendoerfer To: Serge Semin Cc: Serge Semin , Alexey Malahov , Paul Burton , Ralf Baechle , Arnd Bergmann , Rob Herring , devicetree@vger.kernel.org, Zhou Yanjie , Jiaxun Yang , WANG Xuerui , Allison Randal , Greg Kroah-Hartman , Thomas Gleixner , linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v4 07/13] mips: Add CONFIG/CONFIG6/Cause reg fields macro Message-ID: <20200522072855.GE7331@alpha.franken.de> References: <20200521140725.29571-1-Sergey.Semin@baikalelectronics.ru> <20200521140725.29571-8-Sergey.Semin@baikalelectronics.ru> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200521140725.29571-8-Sergey.Semin@baikalelectronics.ru> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, May 21, 2020 at 05:07:18PM +0300, Serge Semin wrote: > There are bit fields which persist in the MIPS CONFIG and CONFIG6 > registers, but haven't been described in the generic mipsregs.h > header so far. In particular, the generic CONFIG bitfields are > BE - endian mode, BM - burst mode, SB - SimpleBE, OCP interface mode > indicator, UDI - user-defined "CorExtend" instructions, DSP - data > scratch pad RAM present, ISP - instruction scratch pad RAM present, > etc. The core-specific CONFIG6 bitfields are JRCD - jump register > cache prediction disable, R6 - MIPSr6 extensions enable, IFUPerfCtl - > IFU performance control, SPCD - sleep state performance counter, DLSB - > disable load/store bonding. A new exception code reported in the > ExcCode field of the Cause register: 30 - Parity/ECC error exception > happened on either fetch, load or cache refill. Lets add them to the > mipsregs.h header to be used in future platform code, which have them > utilized. > > Signed-off-by: Serge Semin > Cc: Alexey Malahov > Cc: Thomas Bogendoerfer > Cc: Paul Burton > Cc: Ralf Baechle > Cc: Arnd Bergmann > Cc: Rob Herring > Cc: devicetree@vger.kernel.org > --- > arch/mips/include/asm/mipsregs.h | 19 +++++++++++++++++++ > arch/mips/kernel/spram.c | 4 ++-- > 2 files changed, 21 insertions(+), 2 deletions(-) applied to mips-next. Thomas. -- Crap can work. Given enough thrust pigs will fly, but it's not necessarily a good idea. [ RFC1925, 2.3 ]