linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: kbuild test robot <lkp@intel.com>
To: Shiju Jose <shiju.jose@huawei.com>,
	linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org,
	linux-kernel@vger.kernel.org, rjw@rjwysocki.net, bp@alien8.de,
	james.morse@arm.com, helgaas@kernel.org, lenb@kernel.org,
	tony.luck@intel.com, dan.carpenter@oracle.com
Cc: kbuild-all@lists.01.org
Subject: Re: [PATCH RESEND v8 2/2] PCI: hip: Add handling of HiSilicon HIP PCIe controller errors
Date: Mon, 1 Jun 2020 07:11:42 +0800	[thread overview]
Message-ID: <202006010758.laNInXUQ%lkp@intel.com> (raw)
In-Reply-To: <20200529200443.736-3-shiju.jose@huawei.com>

[-- Attachment #1: Type: text/plain, Size: 4100 bytes --]

Hi Shiju,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on pci/next]
[also build test WARNING on linus/master v5.7-rc7]
[cannot apply to pm/linux-next linux/master next-20200529]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use '--base' option to specify the
base tree in git format-patch, please see https://stackoverflow.com/a/37406982]

url:    https://github.com/0day-ci/linux/commits/Shiju-Jose/ACPI-APEI-Add-support-to-notify-the-vendor-specific-HW-errors/20200601-003936
base:   https://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git next
config: i386-allyesconfig (attached as .config)
compiler: gcc-9 (Debian 9.3.0-13) 9.3.0
reproduce (this is a W=1 build):
        # save the attached .config to linux build tree
        make W=1 ARCH=i386 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kbuild test robot <lkp@intel.com>

All warnings (new ones prefixed by >>, old ones prefixed by <<):

drivers/pci/controller/pcie-hisi-error.c: In function 'hisi_pcie_handle_error':
>> drivers/pci/controller/pcie-hisi-error.c:246:1: warning: the frame size of 1124 bytes is larger than 1024 bytes [-Wframe-larger-than=]
246 | }
| ^

vim +246 drivers/pci/controller/pcie-hisi-error.c

   181	
   182	static void hisi_pcie_handle_error(const struct hisi_pcie_error_data *error,
   183					   struct platform_device *pdev)
   184	{
   185		char buf[HISI_PCIE_ERR_INFO_SIZE];
   186		char *p = buf, *end = buf + sizeof(buf);
   187		struct device *dev = &pdev->dev;
   188		u32 i;
   189		int rc;
   190	
   191		if (error->val_bits == 0) {
   192			dev_warn(dev, "%s: no valid error information\n", __func__);
   193			return;
   194		}
   195	
   196		/* Logging */
   197		p += snprintf(p, end - p, "[ Table version=%d ", error->version);
   198		if (error->val_bits & HISI_PCIE_LOCAL_VALID_SOC_ID)
   199			p += snprintf(p, end - p, "SOC ID=%d ", error->soc_id);
   200	
   201		if (error->val_bits & HISI_PCIE_LOCAL_VALID_SOCKET_ID)
   202			p += snprintf(p, end - p, "socket ID=%d ", error->socket_id);
   203	
   204		if (error->val_bits & HISI_PCIE_LOCAL_VALID_NIMBUS_ID)
   205			p += snprintf(p, end - p, "nimbus ID=%d ", error->nimbus_id);
   206	
   207		if (error->val_bits & HISI_PCIE_LOCAL_VALID_SUB_MODULE_ID)
   208			p += snprintf(p, end - p, "sub module=%s ",
   209				      hisi_pcie_sub_module_name(error->sub_module_id));
   210	
   211		if (error->val_bits & HISI_PCIE_LOCAL_VALID_CORE_ID)
   212			p += snprintf(p, end - p, "core ID=core%d ", error->core_id);
   213	
   214		if (error->val_bits & HISI_PCIE_LOCAL_VALID_PORT_ID)
   215			p += snprintf(p, end - p, "port ID=port%d ", error->port_id);
   216	
   217		if (error->val_bits & HISI_PCIE_LOCAL_VALID_ERR_SEVERITY)
   218			p += snprintf(p, end - p, "error severity=%s ",
   219				      hisi_pcie_error_severity(error->err_severity));
   220	
   221		if (error->val_bits & HISI_PCIE_LOCAL_VALID_ERR_TYPE)
   222			p += snprintf(p, end - p, "error type=0x%x ", error->err_type);
   223	
   224		p += snprintf(p, end - p, "]\n");
   225		dev_info(dev, "\nHISI : HIP : PCIe controller error\n");
   226		dev_info(dev, "%s\n", buf);
   227	
   228		dev_info(dev, "Reg Dump:\n");
   229		for (i = 0; i < HISI_PCIE_ERR_MISC_REGS; i++) {
   230			if (error->val_bits &
   231					BIT_ULL(HISI_PCIE_LOCAL_VALID_ERR_MISC + i))
   232				dev_info(dev,
   233					 "ERR_MISC_%d=0x%x\n", i, error->err_misc[i]);
   234		}
   235	
   236		/* Recovery for the PCIe controller errors */
   237		if (error->err_severity == HISI_ERR_SEV_RECOVERABLE) {
   238			/* try reset PCI port for the error recovery */
   239			rc = hisi_pcie_port_do_recovery(pdev, error->socket_id,
   240				HISI_PCIE_PORT_ID(error->core_id, error->port_id));
   241			if (rc) {
   242				dev_info(dev, "fail to do hisi pcie port reset\n");
   243				return;
   244			}
   245		}
 > 246	}
   247	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org

[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 72295 bytes --]

      reply	other threads:[~2020-05-31 23:13 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-29 20:04 [PATCH RESEND v8 2/2] PCI: hip: Add handling of HiSilicon HIP PCIe controller errors Shiju Jose
2020-05-31 23:11 ` kbuild test robot [this message]

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=202006010758.laNInXUQ%lkp@intel.com \
    --to=lkp@intel.com \
    --cc=bp@alien8.de \
    --cc=dan.carpenter@oracle.com \
    --cc=helgaas@kernel.org \
    --cc=james.morse@arm.com \
    --cc=kbuild-all@lists.01.org \
    --cc=lenb@kernel.org \
    --cc=linux-acpi@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=rjw@rjwysocki.net \
    --cc=shiju.jose@huawei.com \
    --cc=tony.luck@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).