From: Alexandre Ghiti <alex@ghiti.fr>
To: Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>, Zong Li <zong.li@sifive.com>,
Anup Patel <anup@brainfault.org>, Christoph Hellwig <hch@lst.de>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Cc: Alexandre Ghiti <alex@ghiti.fr>,
Palmer Dabbelt <palmerdabbelt@google.com>
Subject: [PATCH v2 8/8] riscv: Explicit comment about user virtual address space size
Date: Wed, 3 Jun 2020 04:11:04 -0400 [thread overview]
Message-ID: <20200603081104.14004-9-alex@ghiti.fr> (raw)
In-Reply-To: <20200603081104.14004-1-alex@ghiti.fr>
Define precisely the size of the user accessible virtual space size
for sv32/39/48 mmu types and explain why the whole virtual address
space is split into 2 equal chunks between kernel and user space.
Signed-off-by: Alexandre Ghiti <alex@ghiti.fr>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com>
---
arch/riscv/include/asm/pgtable.h | 11 +++++++++--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h
index cb8c6863266b..86bbc2ed1cdd 100644
--- a/arch/riscv/include/asm/pgtable.h
+++ b/arch/riscv/include/asm/pgtable.h
@@ -480,8 +480,15 @@ static inline int ptep_clear_flush_young(struct vm_area_struct *vma,
#endif
/*
- * Task size is 0x4000000000 for RV64 or 0x9fc00000 for RV32.
- * Note that PGDIR_SIZE must evenly divide TASK_SIZE.
+ * Task size is:
+ * - 0x9fc00000 (~2.5GB) for RV32.
+ * - 0x4000000000 ( 256GB) for RV64 using SV39 mmu
+ * - 0x800000000000 ( 128TB) for RV64 using SV48 mmu
+ *
+ * Note that PGDIR_SIZE must evenly divide TASK_SIZE since "RISC-V
+ * Instruction Set Manual Volume II: Privileged Architecture" states that
+ * "load and store effective addresses, which are 64bits, must have bits
+ * 63–48 all equal to bit 47, or else a page-fault exception will occur."
*/
#ifdef CONFIG_64BIT
#define TASK_SIZE (PGDIR_SIZE * PTRS_PER_PGD / 2)
--
2.20.1
next prev parent reply other threads:[~2020-06-03 8:19 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-03 8:10 [PATCH v2 0/8] Introduce sv48 support Alexandre Ghiti
2020-06-03 8:10 ` [PATCH v2 1/8] riscv: Get rid of compile time logic with MAX_EARLY_MAPPING_SIZE Alexandre Ghiti
2020-06-03 8:10 ` [PATCH v2 2/8] riscv: Allow to dynamically define VA_BITS Alexandre Ghiti
2020-06-03 8:10 ` [PATCH v2 3/8] riscv: Simplify MAXPHYSMEM config Alexandre Ghiti
2020-06-03 8:11 ` [PATCH v2 4/8] riscv: Prepare ptdump for vm layout dynamic addresses Alexandre Ghiti
2020-06-03 8:11 ` [PATCH v2 5/8] riscv: Implement sv48 support Alexandre Ghiti
2020-06-27 12:30 ` Nick Kossifidis
2020-06-27 14:26 ` Alex Ghiti
2020-06-03 8:11 ` [PATCH v2 6/8] riscv: Allow user to downgrade to sv39 when hw supports sv48 Alexandre Ghiti
2020-06-03 8:11 ` [PATCH v2 7/8] riscv: Use pgtable_l4_enabled to output mmu type in cpuinfo Alexandre Ghiti
2020-06-03 8:11 ` Alexandre Ghiti [this message]
2020-06-18 5:37 ` [PATCH v2 0/8] Introduce sv48 support Alex Ghiti
2020-06-18 21:54 ` Palmer Dabbelt
2020-07-01 18:27 ` Palmer Dabbelt
2020-07-03 5:22 ` Alex Ghiti
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