From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0E638C433E0 for ; Thu, 4 Jun 2020 11:54:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D7EFB20663 for ; Thu, 4 Jun 2020 11:54:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728051AbgFDLyQ (ORCPT ); Thu, 4 Jun 2020 07:54:16 -0400 Received: from 8bytes.org ([81.169.241.247]:46274 "EHLO theia.8bytes.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725601AbgFDLyP (ORCPT ); Thu, 4 Jun 2020 07:54:15 -0400 Received: by theia.8bytes.org (Postfix, from userid 1000) id 744CC26F; Thu, 4 Jun 2020 13:54:14 +0200 (CEST) Date: Thu, 4 Jun 2020 13:54:13 +0200 From: Joerg Roedel To: Borislav Petkov Cc: x86@kernel.org, hpa@zytor.com, Andy Lutomirski , Dave Hansen , Peter Zijlstra , Thomas Hellstrom , Jiri Slaby , Dan Williams , Tom Lendacky , Juergen Gross , Kees Cook , David Rientjes , Cfir Cohen , Erdem Aktas , Masami Hiramatsu , Mike Stunes , Joerg Roedel , linux-kernel@vger.kernel.org, kvm@vger.kernel.org, virtualization@lists.linux-foundation.org Subject: Re: [PATCH v3 40/75] x86/sev-es: Compile early handler code into kernel image Message-ID: <20200604115413.GB30945@8bytes.org> References: <20200428151725.31091-1-joro@8bytes.org> <20200428151725.31091-41-joro@8bytes.org> <20200520091415.GC1457@zn.tnic> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200520091415.GC1457@zn.tnic> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, May 20, 2020 at 11:14:15AM +0200, Borislav Petkov wrote: > On Tue, Apr 28, 2020 at 05:16:50PM +0200, Joerg Roedel wrote: > > +static inline u64 sev_es_rd_ghcb_msr(void) > > +{ > > + return native_read_msr(MSR_AMD64_SEV_ES_GHCB); > > +} > > + > > +static inline void sev_es_wr_ghcb_msr(u64 val) > > +{ > > + u32 low, high; > > + > > + low = (u32)(val); > > + high = (u32)(val >> 32); > > + > > + native_write_msr(MSR_AMD64_SEV_ES_GHCB, low, high); > > +} > > Instead of duplicating those two, you can lift the ones in the > compressed image into sev-es.h and use them here. I don't care one bit > about the MSR tracepoints in native_*_msr(). It is not only the trace-point, this would also eliminate exception handling in case the MSR access triggers a #GP. The "Unhandled MSR read/write" messages would turn into a "General Protection Fault" message. Joerg