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[84.3.50.134]) by smtp.gmail.com with ESMTPSA id r2sm9485950wrg.68.2020.06.04.10.29.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 04 Jun 2020 10:29:06 -0700 (PDT) Date: Thu, 4 Jun 2020 19:29:04 +0200 From: Ingo Molnar To: Linus Torvalds Cc: Thomas Gleixner , Benjamin Herrenschmidt , Balbir Singh , Peter Zijlstra , Andrew Morton , Borislav Petkov , Linux Kernel Mailing List , Andrew Lutomirski Subject: [GIT PULL v2] x86/mm changes for v5.8 Message-ID: <20200604172904.GA1751362@gmail.com> References: <20200601170102.GA1346815@gmail.com> <20200602073350.GA481221@gmail.com> <871rmxgw4d.fsf@nanos.tec.linutronix.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org * Linus Torvalds wrote: > I really get the feeling that this feature just isn't ready. > > Ingo - would you mind sending me a pull request for the (independent) > TLB cleanups part of that x86/mm tree? Because everything up to and > including commit bd1de2a7aace ("x86/tlb/uv: Add a forward declaration > for struct flush_tlb_info") looks sane. Yeah, agreed, in fact we moved x86/mm back to bd1de2a7aace almost immediately and put the L1D bits into WIP.x86/mm. Fortunately they are on top of the rest, as you noted, so it didn't have to be rebased. > It's only this L1D$ flushing thing at the end of that branch that I > think isn't fully cooked. Yeah, sure - here's the updated pull request for the rest: git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86-mm-2020-06-04 # HEAD: bd1de2a7aace4d1d312fb1be264b8fafdb706208 x86/tlb/uv: Add a forward declaration for struct flush_tlb_info Misc changes: - Unexport various PAT primitives - Unexport per-CPU tlbstate Thanks, Ingo ------------------> Borislav Petkov (1): x86/tlb/uv: Add a forward declaration for struct flush_tlb_info Christoph Hellwig (5): x86/mm: Add a x86_has_pat_wp() helper x86/mm: Move pgprot2cachemode out of line x86/mm: Cleanup pgprot_4k_2_large() and pgprot_large_2_4k() x86/mm: Unexport __cachemode2pte_tbl x86/mm: Use pgprotval_t in protval_4k_2_large() and protval_large_2_4k() Thomas Gleixner (17): x86/tlb: Uninline __get_current_cr3_fast() x86/cpu: Uninline CR4 accessors x86/cr4: Sanitize CR4.PCE update x86/alternatives: Move temporary_mm helpers into C x86/tlb: Move __flush_tlb() out of line x86/tlb: Move __flush_tlb_global() out of line x86/tlb: Move __flush_tlb_one_user() out of line x86/tlb: Move __flush_tlb_one_kernel() out of line x86/tlb: Move flush_tlb_others() out of line x86/tlb: Move __flush_tlb_all() out of line x86/tlb: Move paravirt_tlb_remove_table() to the usage site x86/tlb: Move cr4_set_bits_and_update_boot() to the usage site x86/tlb: Uninline nmi_uaccess_okay() x86/tlb: Move PCID helpers where they are used xen/privcmd: Remove unneeded asm/tlb.h include x86/tlb: Restrict access to tlbstate x86/cpu: Export native_write_cr4() only when CONFIG_LKTDM=m arch/x86/events/core.c | 11 +- arch/x86/include/asm/memtype.h | 3 + arch/x86/include/asm/mmu_context.h | 88 +------ arch/x86/include/asm/paravirt.h | 12 +- arch/x86/include/asm/pgtable_32.h | 2 +- arch/x86/include/asm/pgtable_types.h | 44 +--- arch/x86/include/asm/tlbflush.h | 441 ++++------------------------------- arch/x86/include/asm/uv/uv.h | 1 + arch/x86/kernel/alternative.c | 55 +++++ arch/x86/kernel/cpu/common.c | 25 +- arch/x86/kernel/cpu/mtrr/generic.c | 4 +- arch/x86/kernel/paravirt.c | 21 +- arch/x86/kernel/process.c | 11 + arch/x86/mm/init.c | 44 +++- arch/x86/mm/init_64.c | 4 +- arch/x86/mm/ioremap.c | 10 +- arch/x86/mm/kmmio.c | 2 +- arch/x86/mm/mem_encrypt.c | 2 +- arch/x86/mm/pat/set_memory.c | 7 +- arch/x86/mm/pgtable.c | 16 +- arch/x86/mm/pgtable_32.c | 2 +- arch/x86/mm/tlb.c | 384 +++++++++++++++++++++++++++++- arch/x86/platform/uv/tlb_uv.c | 4 +- drivers/xen/privcmd.c | 1 - 24 files changed, 608 insertions(+), 586 deletions(-)