[PATCH v2 0/2] usb : phy: Add USB PHY support on Intel LGM SoC

[PATCH v2 0/2] usb : phy: Add USB PHY support on Intel LGM SoC

[Ramuthevar,Vadivel MuruganX]

The USB PHY provides the optimized for low power dissipation while active, idle, or on standby.
Requires minimal external components, a single resistor, for best operation.
Supports 10/5-Gbps high-speed data transmission rates through 3-m USB 3.x cable 
---
v2:
  - Address Phillip's review comments
  - replace devm_reset_control_get() by devm_reset_control_get_exclusive()
  - re-design the assert and deassert fucntion calls as per review comments
  - address kbuild bot warnings
  - add the comments 
v1:
  - initial version

---
dt-bindings: usb: Add USB PHY support for Intel LGM SoC
v2:
  - No Change
v1:
  - initial version


Ramuthevar Vadivel Murugan (2):
  dt-bindings: usb: Add USB PHY support for Intel LGM SoC
  usb: phy: Add USB3 PHY support for Intel LGM SoC

 .../devicetree/bindings/usb/intel,lgm-usb-phy.yaml |  53 ++++
 drivers/usb/phy/Kconfig                            |  11 +
 drivers/usb/phy/Makefile                           |   1 +
 drivers/usb/phy/phy-lgm-usb.c                      | 280 +++++++++++++++++++++
 4 files changed, 345 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/usb/intel,lgm-usb-phy.yaml
 create mode 100644 drivers/usb/phy/phy-lgm-usb.c

-- 
2.11.0

[PATCH v2 1/2] dt-bindings: usb: Add USB PHY support for Intel LGM SoC

[Ramuthevar,Vadivel MuruganX]

From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>

Add the dt-schema to support USB PHY on Intel LGM SoC

Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
---
 .../devicetree/bindings/usb/intel,lgm-usb-phy.yaml | 53 ++++++++++++++++++++++
 1 file changed, 53 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/usb/intel,lgm-usb-phy.yaml

diff --git a/Documentation/devicetree/bindings/usb/intel,lgm-usb-phy.yaml b/Documentation/devicetree/bindings/usb/intel,lgm-usb-phy.yaml
new file mode 100644
index 000000000000..0fc76cd23774
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/intel,lgm-usb-phy.yaml
@@ -0,0 +1,53 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/usb/intel,lgm-usb-phy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Intel LGM USB PHY Device Tree Bindings
+
+maintainers:
+  - Vadivel Murugan Ramuthevar <vadivel.muruganx.ramuthevar@linux.intel.com>
+
+properties:
+  compatible:
+    const: intel,lgm-usb-phy
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+
+  resets:
+    items:
+      - description: USB PHY and Host controller reset
+      - description: APB BUS reset
+      - description: General Hardware reset
+
+  reset-names:
+    items:
+      - const: phy
+      - const: apb
+      - const: phy31
+
+required:
+  - compatible
+  - clocks
+  - reg
+  - resets
+  - reset-names
+
+additionalProperties: false
+
+examples:
+  - |
+    usb_phy: usb_phy@e7e00000 {
+        compatible = "intel,lgm-usb-phy";
+        reg = <0xe7e00000 0x10000>;
+        clocks = <&cgu0 153>;
+        resets = <&rcu 0x70 0x24>,
+                 <&rcu 0x70 0x26>,
+                 <&rcu 0x70 0x28>;
+        reset-names = "phy", "apb", "phy31";
+    };
-- 
2.11.0

[PATCH v2 2/2] usb: phy: Add USB3 PHY support for Intel LGM SoC

[Ramuthevar,Vadivel MuruganX]

From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>

Add support for USB PHY on Intel LGM SoC.

Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
---
 drivers/usb/phy/Kconfig       |  11 ++
 drivers/usb/phy/Makefile      |   1 +
 drivers/usb/phy/phy-lgm-usb.c | 280 ++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 292 insertions(+)
 create mode 100644 drivers/usb/phy/phy-lgm-usb.c

diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
index 4b3fa78995cf..95f2e737d663 100644
--- a/drivers/usb/phy/Kconfig
+++ b/drivers/usb/phy/Kconfig
@@ -192,4 +192,15 @@ config JZ4770_PHY
 	  This driver provides PHY support for the USB controller found
 	  on the JZ4770 SoC from Ingenic.
 
+config USB_LGM_PHY
+	tristate "INTEL Lightning Mountain USB PHY Driver"
+	depends on USB_SUPPORT
+	select USB_PHY
+	select REGULATOR
+	select REGULATOR_FIXED_VOLTAGE
+	help
+	  Enable this to support Intel DWC3 PHY USB phy. This driver provides
+	  interface to interact with USB GEN-II and USB 3.x PHY that is part
+	  of the Intel network SOC.
+
 endmenu
diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile
index b352bdbe8712..ef5345164e10 100644
--- a/drivers/usb/phy/Makefile
+++ b/drivers/usb/phy/Makefile
@@ -25,3 +25,4 @@ obj-$(CONFIG_USB_ULPI)			+= phy-ulpi.o
 obj-$(CONFIG_USB_ULPI_VIEWPORT)		+= phy-ulpi-viewport.o
 obj-$(CONFIG_KEYSTONE_USB_PHY)		+= phy-keystone.o
 obj-$(CONFIG_JZ4770_PHY)		+= phy-jz4770.o
+obj-$(CONFIG_USB_LGM_PHY)		+= phy-lgm-usb.o
diff --git a/drivers/usb/phy/phy-lgm-usb.c b/drivers/usb/phy/phy-lgm-usb.c
new file mode 100644
index 000000000000..eb415533bc66
--- /dev/null
+++ b/drivers/usb/phy/phy-lgm-usb.c
@@ -0,0 +1,280 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Intel LGM USB PHY driver
+ *
+ * Copyright (C) 2020 Intel Corporation.
+ */
+
+#include <linux/bitfield.h>
+#include <linux/delay.h>
+#include <linux/iopoll.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/regulator/consumer.h>
+#include <linux/reset.h>
+#include <linux/usb/phy.h>
+#include <linux/workqueue.h>
+
+#define CTRL1_OFFSET		0x14
+#define SRAM_EXT_LD_DONE	BIT(25)
+#define SRAM_INIT_DONE		BIT(26)
+
+#define TCPC_OFFSET		0x1014
+#define TCPC_MUX_CTL		GENMASK(1, 0)
+#define MUX_NC			0
+#define MUX_USB			1
+#define MUX_DP			2
+#define MUX_USBDP		3
+#define TCPC_FLIPPED		BIT(2)
+#define TCPC_LOW_POWER_EN	BIT(3)
+#define TCPC_VALID		BIT(4)
+#define TCPC_DISCONN		\
+	(TCPC_VALID | FIELD_PREP(TCPC_MUX_CTL, MUX_NC) | TCPC_LOW_POWER_EN)
+
+static const char *const PHY_RESETS[] = { "phy31", "phy", };
+static const char *const CTL_RESETS[] = { "apb", "ctrl", };
+
+struct tca_apb {
+	struct reset_control *resets[ARRAY_SIZE(PHY_RESETS)];
+	struct regulator *vbus;
+	struct work_struct wk;
+	struct usb_phy phy;
+
+	bool phy_initialized;
+	bool connected;
+};
+
+static int get_flipped(struct tca_apb *ta, bool *flipped)
+{
+	union extcon_property_value property;
+	int ret;
+
+	ret = extcon_get_property(ta->phy.edev, EXTCON_USB_HOST,
+				  EXTCON_PROP_USB_TYPEC_POLARITY, &property);
+	if (ret) {
+		dev_err(ta->phy.dev, "no polarity property from extcon\n");
+		return false;
+	}
+
+	*flipped = property.intval;
+
+	return *flipped;
+}
+
+static int phy_init(struct usb_phy *phy)
+{
+	struct tca_apb *ta = container_of(phy, struct tca_apb, phy);
+	void __iomem *ctrl1 = phy->io_priv + CTRL1_OFFSET;
+	int val, ret, i;
+
+	if (ta->phy_initialized)
+		return 0;
+
+	for (i = 0; i < ARRAY_SIZE(PHY_RESETS); i++)
+		reset_control_deassert(ta->resets[i]);
+
+	ret = readl_poll_timeout(ctrl1, val, val & SRAM_INIT_DONE,
+				 10, 10 * 1000);
+	if (ret) {
+		dev_err(ta->phy.dev, "SRAM init failed, 0x%x\n", val);
+		return ret;
+	}
+
+	writel(readl(ctrl1) | SRAM_EXT_LD_DONE, ctrl1);
+
+	ta->phy_initialized = true;
+	if (!ta->phy.edev)
+		return phy->set_vbus(phy, true);
+
+	schedule_work(&ta->wk);
+
+	return 0;
+}
+
+static void phy_shutdown(struct usb_phy *phy)
+{
+	struct tca_apb *ta = container_of(phy, struct tca_apb, phy);
+	int i;
+
+	if (!ta->phy_initialized)
+		return;
+
+	ta->phy_initialized = false;
+	flush_work(&ta->wk);
+	ta->phy.set_vbus(&ta->phy, false);
+	if (ta->connected) {
+		ta->connected = false;
+		writel(TCPC_DISCONN, ta->phy.io_priv + TCPC_OFFSET);
+	}
+
+	for (i = 0; i < ARRAY_SIZE(PHY_RESETS); i++)
+		reset_control_assert(ta->resets[i]);
+}
+
+static int phy_set_vbus(struct usb_phy *phy, int on)
+{
+	struct tca_apb *ta = container_of(phy, struct tca_apb, phy);
+	int ret = 0;
+
+	if (on) {
+		ret = regulator_enable(ta->vbus);
+		if (ret)
+			dev_err(ta->phy.dev, "regulator not enabled\n");
+	} else {
+		ret = regulator_disable(ta->vbus);
+		if (ret)
+			dev_err(ta->phy.dev, "regulator not disabled\n");
+	}
+
+	return ret;
+}
+
+static void tca_work(struct work_struct *work)
+{
+	struct tca_apb *ta = container_of(work, struct tca_apb, wk);
+	bool connected;
+	bool flipped = false;
+	u32 val;
+	int ret;
+
+	ret = get_flipped(ta, &flipped);
+	if (!ret)
+		dev_err(ta->phy.dev, "no polarity property from extcon\n");
+
+	connected = extcon_get_state(ta->phy.edev, EXTCON_USB_HOST);
+	if (connected == ta->connected)
+		return;
+
+	ta->connected = connected;
+	if (connected) {
+		val = TCPC_VALID | FIELD_PREP(TCPC_MUX_CTL, MUX_USB);
+		if (flipped)
+			val |= TCPC_FLIPPED;
+		dev_info(ta->phy.dev, "connected%s\n",
+			 flipped ? " flipped" : "");
+	} else {
+		val = TCPC_DISCONN;
+		dev_info(ta->phy.dev, "disconnected\n");
+	}
+
+	writel(val, ta->phy.io_priv + TCPC_OFFSET);
+
+	if (ta->phy.set_vbus(&ta->phy, connected))
+		dev_err(ta->phy.dev, "failed to set VBUS\n");
+}
+
+static int id_notifier(struct notifier_block *nb, unsigned long event, void *ptr)
+{
+	struct tca_apb *ta = container_of(nb, struct tca_apb, phy.id_nb);
+
+	if (ta->phy_initialized)
+		schedule_work(&ta->wk);
+
+	return NOTIFY_DONE;
+}
+
+static int vbus_notifier(struct notifier_block *nb,
+			 unsigned long event, void *ptr)
+{
+	return NOTIFY_DONE;
+}
+
+static int phy_probe(struct platform_device *pdev)
+{
+	struct reset_control *resets[ARRAY_SIZE(CTL_RESETS)];
+	struct device *dev = &pdev->dev;
+	struct usb_phy *phy;
+	struct tca_apb *ta;
+	int i;
+
+	ta = devm_kzalloc(dev, sizeof(*ta), GFP_KERNEL);
+	if (!ta)
+		return -ENOMEM;
+
+	platform_set_drvdata(pdev, ta);
+	INIT_WORK(&ta->wk, tca_work);
+
+	phy = &ta->phy;
+	phy->dev = dev;
+	phy->label = dev_name(dev);
+	phy->type = USB_PHY_TYPE_USB3;
+	phy->init = phy_init;
+	phy->shutdown = phy_shutdown;
+	phy->set_vbus = phy_set_vbus;
+	phy->id_nb.notifier_call = id_notifier;
+	phy->vbus_nb.notifier_call = vbus_notifier;
+
+	phy->io_priv = devm_platform_ioremap_resource(pdev, 0);
+	if (IS_ERR(phy->io_priv))
+		return PTR_ERR(phy->io_priv);
+
+	ta->vbus = devm_regulator_get(dev, "vbus");
+	if (IS_ERR(ta->vbus))
+		return PTR_ERR(ta->vbus);
+
+	for (i = 0; i < ARRAY_SIZE(CTL_RESETS); i++) {
+		resets[i] = devm_reset_control_get_exclusive(dev, CTL_RESETS[i]);
+		if (IS_ERR(resets[i])) {
+			dev_err(dev, "%s reset not found\n", CTL_RESETS[i]);
+			return PTR_ERR(resets[i]);
+		}
+	}
+
+	for (i = 0; i < ARRAY_SIZE(PHY_RESETS); i++) {
+		ta->resets[i] = devm_reset_control_get_exclusive(dev, PHY_RESETS[i]);
+		if (IS_ERR(ta->resets[i])) {
+			dev_err(dev, "%s reset not found\n", PHY_RESETS[i]);
+			return PTR_ERR(ta->resets[i]);
+		}
+	}
+
+	for (i = 0; i < ARRAY_SIZE(CTL_RESETS); i++)
+		reset_control_assert(resets[i]);
+
+	for (i = 0; i < ARRAY_SIZE(PHY_RESETS); i++)
+		reset_control_assert(ta->resets[i]);
+	/*
+	 * Out-of-band reset of the controller after PHY reset will cause
+	 * controller malfunctioning, so we should use in-band controller
+	 * reset only and leave the controller de-asserted here.
+	 */
+	for (i = 0; i < ARRAY_SIZE(CTL_RESETS); i++)
+		reset_control_deassert(resets[i]);
+
+	/* Need to wait at least 20us after de-assert the controller */
+	usleep_range(20, 100);
+
+	return usb_add_phy_dev(phy);
+}
+
+static int phy_remove(struct platform_device *pdev)
+{
+	struct tca_apb *ta = platform_get_drvdata(pdev);
+
+	usb_remove_phy(&ta->phy);
+
+	return 0;
+}
+
+static const struct of_device_id intel_usb_phy_dt_ids[] = {
+	{ .compatible = "intel,lgm-usb-phy" },
+	{ }
+};
+MODULE_DEVICE_TABLE(of, intel_usb_phy_dt_ids);
+
+static struct platform_driver lgm_phy_driver = {
+	.driver = {
+		.name = "lgm-usb-phy",
+		.of_match_table = intel_usb_phy_dt_ids,
+	},
+	.probe = phy_probe,
+	.remove = phy_remove,
+};
+
+module_platform_driver(lgm_phy_driver);
+
+MODULE_DESCRIPTION("Intel LGM USB PHY driver");
+MODULE_AUTHOR("Li Yin <yin1.li@intel.com>");
+MODULE_AUTHOR("Vadivel Murugan R <vadivel.muruganx.ramuthevar@linux.intel.com>");
+MODULE_LICENSE("GPL v2");
-- 
2.11.0

Re: [PATCH v2 2/2] usb: phy: Add USB3 PHY support for Intel LGM SoC

[Andy Shevchenko]

On Thu, Jun 11, 2020 at 10:12:46AM +0800, Ramuthevar,Vadivel MuruganX wrote:
> From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
> 
> Add support for USB PHY on Intel LGM SoC.

...

> +static int get_flipped(struct tca_apb *ta, bool *flipped)
> +{
> +	union extcon_property_value property;
> +	int ret;
> +
> +	ret = extcon_get_property(ta->phy.edev, EXTCON_USB_HOST,
> +				  EXTCON_PROP_USB_TYPEC_POLARITY, &property);
> +	if (ret) {
> +		dev_err(ta->phy.dev, "no polarity property from extcon\n");

> +		return false;

return ret;

> +	}
> +
> +	*flipped = property.intval;
> +

> +	return *flipped;

return 0;

> +}

...I suppose it should be as above.

...

> +	ret = readl_poll_timeout(ctrl1, val, val & SRAM_INIT_DONE,
> +				 10, 10 * 1000);

On one line easier to read.

> +	if (ret) {
> +		dev_err(ta->phy.dev, "SRAM init failed, 0x%x\n", val);
> +		return ret;
> +	}

...

> +static int phy_set_vbus(struct usb_phy *phy, int on)
> +{
> +	struct tca_apb *ta = container_of(phy, struct tca_apb, phy);

> +	int ret = 0;

Assignment is redundant.

> +
> +	if (on) {
> +		ret = regulator_enable(ta->vbus);
> +		if (ret)
> +			dev_err(ta->phy.dev, "regulator not enabled\n");
> +	} else {
> +		ret = regulator_disable(ta->vbus);
> +		if (ret)
> +			dev_err(ta->phy.dev, "regulator not disabled\n");
> +	}
> +
> +	return ret;
> +}

...

> +	ret = get_flipped(ta, &flipped);
> +	if (!ret)
> +		dev_err(ta->phy.dev, "no polarity property from extcon\n");

This should be fixed accordingly.

...

> +		dev_info(ta->phy.dev, "connected%s\n",
> +			 flipped ? " flipped" : "");

One line.

-- 
With Best Regards,
Andy Shevchenko

Re: [PATCH v2 2/2] usb: phy: Add USB3 PHY support for Intel LGM SoC

[Ramuthevar, Vadivel MuruganX]

Hi Andy,

Thank you so much for the review comments...

On 11/6/2020 4:12 pm, Andy Shevchenko wrote:
> On Thu, Jun 11, 2020 at 10:12:46AM +0800, Ramuthevar,Vadivel MuruganX wrote:
>> From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
>>
>> Add support for USB PHY on Intel LGM SoC.
> 
> ...
> 
>> +static int get_flipped(struct tca_apb *ta, bool *flipped)
>> +{
>> +	union extcon_property_value property;
>> +	int ret;
>> +
>> +	ret = extcon_get_property(ta->phy.edev, EXTCON_USB_HOST,
>> +				  EXTCON_PROP_USB_TYPEC_POLARITY, &property);
>> +	if (ret) {
>> +		dev_err(ta->phy.dev, "no polarity property from extcon\n");
> 
>> +		return false;
> 
> return ret;
Noted.
> 
>> +	}
>> +
>> +	*flipped = property.intval;
>> +
> 
>> +	return *flipped;
> 
> return 0;
Noted.
> 
>> +}
> 
> ...I suppose it should be as above.
> 
> ...
> 
>> +	ret = readl_poll_timeout(ctrl1, val, val & SRAM_INIT_DONE,
>> +				 10, 10 * 1000);
exceeds more than 80 characters, so checkpatch throws warnings, to avoid 
that move to next line.
> 
> On one line easier to read.
> 
>> +	if (ret) {
>> +		dev_err(ta->phy.dev, "SRAM init failed, 0x%x\n", val);
>> +		return ret;
>> +	}
> 
> ...
> 
>> +static int phy_set_vbus(struct usb_phy *phy, int on)
>> +{
>> +	struct tca_apb *ta = container_of(phy, struct tca_apb, phy);
> 
>> +	int ret = 0;
> 
> Assignment is redundant.
so you mean , should be declared as
int ret;
right?

> 
>> +
>> +	if (on) {
>> +		ret = regulator_enable(ta->vbus);
>> +		if (ret)
>> +			dev_err(ta->phy.dev, "regulator not enabled\n");
>> +	} else {
>> +		ret = regulator_disable(ta->vbus);
>> +		if (ret)
>> +			dev_err(ta->phy.dev, "regulator not disabled\n");
>> +	}
>> +
>> +	return ret;
>> +}
> 
> ...
> 
>> +	ret = get_flipped(ta, &flipped);
>> +	if (!ret)
>> +		dev_err(ta->phy.dev, "no polarity property from extcon\n");
> 
> This should be fixed accordingly.
Noted.
> 
> ...
> 
>> +		dev_info(ta->phy.dev, "connected%s\n",
>> +			 flipped ? " flipped" : "");
> 
> One line.
exceeds more than 80 characters, so checkpatch throw warnings, to avoid 
that moved to next line.

Regards
Vadivel
> 

Re: [PATCH v2 2/2] usb: phy: Add USB3 PHY support for Intel LGM SoC

[Andy Shevchenko]

On Thu, Jun 11, 2020 at 04:36:29PM +0800, Ramuthevar, Vadivel MuruganX wrote:
> On 11/6/2020 4:12 pm, Andy Shevchenko wrote:
> > On Thu, Jun 11, 2020 at 10:12:46AM +0800, Ramuthevar,Vadivel MuruganX wrote:
> > > From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>

...

> > > +	ret = readl_poll_timeout(ctrl1, val, val & SRAM_INIT_DONE,
> > > +				 10, 10 * 1000);
> exceeds more than 80 characters, so checkpatch throws warnings, to avoid
> that move to next line.

> > On one line easier to read.

It's 82 characters. It's fine.

> > > +	if (ret) {
> > > +		dev_err(ta->phy.dev, "SRAM init failed, 0x%x\n", val);
> > > +		return ret;
> > > +	}

...

> > > +	int ret = 0;
> > 
> > Assignment is redundant.
> so you mean , should be declared as
> int ret;
> right?

Right.

...

> > > +		dev_info(ta->phy.dev, "connected%s\n",
> > > +			 flipped ? " flipped" : "");
> > 
> > One line.
> exceeds more than 80 characters, so checkpatch throw warnings, to avoid that
> moved to next line.

It's fine to have on one line.

And by the way, try new checkpatch.


-- 
With Best Regards,
Andy Shevchenko

Re: [PATCH v2 2/2] usb: phy: Add USB3 PHY support for Intel LGM SoC

[Ramuthevar, Vadivel MuruganX]

Hi Andy,

  Thank you very much for prompt review comments...

On 11/6/2020 4:57 pm, Andy Shevchenko wrote:
> On Thu, Jun 11, 2020 at 04:36:29PM +0800, Ramuthevar, Vadivel MuruganX wrote:
>> On 11/6/2020 4:12 pm, Andy Shevchenko wrote:
>>> On Thu, Jun 11, 2020 at 10:12:46AM +0800, Ramuthevar,Vadivel MuruganX wrote:
>>>> From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
> 
> ...
> 
>>>> +	ret = readl_poll_timeout(ctrl1, val, val & SRAM_INIT_DONE,
>>>> +				 10, 10 * 1000);
>> exceeds more than 80 characters, so checkpatch throws warnings, to avoid
>> that move to next line.
> 
>>> On one line easier to read.
> 
> It's 82 characters. It's fine.
Noted.
> 
>>>> +	if (ret) {
>>>> +		dev_err(ta->phy.dev, "SRAM init failed, 0x%x\n", val);
>>>> +		return ret;
>>>> +	}
> 
> ...
> 
>>>> +	int ret = 0;
>>>
>>> Assignment is redundant.
>> so you mean , should be declared as
>> int ret;
>> right?
> 
> Right.
okay, Thanks!
> 
> ...
> 
>>>> +		dev_info(ta->phy.dev, "connected%s\n",
>>>> +			 flipped ? " flipped" : "");
>>>
>>> One line.
>> exceeds more than 80 characters, so checkpatch throw warnings, to avoid that
>> moved to next line.
> 
> It's fine to have on one line.
> 
> And by the way, try new checkpatch.
Sure , will try and fix it.

Regards
Vadivel
> 
> 

Re: [PATCH v2 2/2] usb: phy: Add USB3 PHY support for Intel LGM SoC

[Felipe Balbi]

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"Ramuthevar,Vadivel MuruganX"
<vadivel.muruganx.ramuthevar@linux.intel.com> writes:

> From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
>
> Add support for USB PHY on Intel LGM SoC.
>
> Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>

use drivers/phy/ instead.

-- 
balbi

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