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From: Peter Zijlstra <peterz@infradead.org>
To: Fenghua Yu <fenghua.yu@intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
	H Peter Anvin <hpa@zytor.com>,
	David Woodhouse <dwmw2@infradead.org>,
	Lu Baolu <baolu.lu@linux.intel.com>,
	Frederic Barrat <fbarrat@linux.ibm.com>,
	Andrew Donnellan <ajd@linux.ibm.com>,
	Felix Kuehling <Felix.Kuehling@amd.com>,
	Joerg Roedel <joro@8bytes.org>,
	Dave Hansen <dave.hansen@intel.com>,
	Tony Luck <tony.luck@intel.com>, Ashok Raj <ashok.raj@intel.com>,
	Jacob Jun Pan <jacob.jun.pan@intel.com>,
	Dave Jiang <dave.jiang@intel.com>,
	Yu-cheng Yu <yu-cheng.yu@intel.com>,
	Sohil Mehta <sohil.mehta@intel.com>,
	Ravi V Shankar <ravi.v.shankar@intel.com>,
	linux-kernel <linux-kernel@vger.kernel.org>, x86 <x86@kernel.org>,
	iommu@lists.linux-foundation.org,
	amd-gfx <amd-gfx@lists.freedesktop.org>,
	linuxppc-dev <linuxppc-dev@lists.ozlabs.org>
Subject: Re: [PATCH v2 12/12] x86/traps: Fix up invalid PASID
Date: Mon, 15 Jun 2020 23:53:53 +0200	[thread overview]
Message-ID: <20200615215353.GH2514@hirez.programming.kicks-ass.net> (raw)
In-Reply-To: <20200615201735.GE13792@romley-ivt3.sc.intel.com>

On Mon, Jun 15, 2020 at 01:17:35PM -0700, Fenghua Yu wrote:
> Hi, Peter,
> 
> On Mon, Jun 15, 2020 at 09:09:28PM +0200, Peter Zijlstra wrote:
> > On Mon, Jun 15, 2020 at 11:55:29AM -0700, Fenghua Yu wrote:
> > 
> > > Or do you suggest to add a random new flag in struct thread_info instead
> > > of a TIF flag?
> > 
> > Why thread_info? What's wrong with something simple like the below. It
> > takes a bit from the 'strictly current' flags word.
> > 
> > 
> > diff --git a/include/linux/sched.h b/include/linux/sched.h
> > index b62e6aaf28f0..fca830b97055 100644
> > --- a/include/linux/sched.h
> > +++ b/include/linux/sched.h
> > @@ -801,6 +801,9 @@ struct task_struct {
> >  	/* Stalled due to lack of memory */
> >  	unsigned			in_memstall:1;
> >  #endif
> > +#ifdef CONFIG_PCI_PASID
> > +	unsigned			has_valid_pasid:1;
> > +#endif
> >  
> >  	unsigned long			atomic_flags; /* Flags requiring atomic access. */
> >  
> > diff --git a/kernel/fork.c b/kernel/fork.c
> > index 142b23645d82..10b3891be99e 100644
> > --- a/kernel/fork.c
> > +++ b/kernel/fork.c
> > @@ -955,6 +955,10 @@ static struct task_struct *dup_task_struct(struct task_struct *orig, int node)
> >  	tsk->use_memdelay = 0;
> >  #endif
> >  
> > +#ifdef CONFIG_PCI_PASID
> > +	tsk->has_valid_pasid = 0;
> > +#endif
> > +
> >  #ifdef CONFIG_MEMCG
> >  	tsk->active_memcg = NULL;
> >  #endif
> 
> The PASID MSR is x86 specific although PASID is PCIe concept and per-mm.
> Checking if the MSR has valid PASID (bit31=1) is an x86 specifc work.
> The flag should be cleared in cloned()/forked() and is only set and
> read in fixup() in x86 #GP for heuristic. It's not used anywhere outside
> of x86.
> 
> That's why we think the flag should be in x86 struct thread_info instead
> of in generice struct task_struct.

I don't think anybody really cares, it's just one bit, we have plenty
left.

On x86_64 there's a u32 sized alignment hole in thread_info, also we
don't use the upper 32bit of thread_info::flags, however using those
would still mean you have to use atomic ops, which you really don't
need.



  parent reply	other threads:[~2020-06-15 21:54 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-13  0:41 [PATCH v2 00/12] x86: tag application address space for devices Fenghua Yu
2020-06-13  0:41 ` [PATCH v2 01/12] iommu: Change type of pasid to unsigned int Fenghua Yu
2020-06-13  0:41 ` [PATCH v2 02/12] ocxl: " Fenghua Yu
2020-06-18  8:05   ` Frederic Barrat
2020-06-18 15:37     ` Fenghua Yu
2020-06-18 16:56       ` Frederic Barrat
2020-06-13  0:41 ` [PATCH v2 03/12] iommu/vt-d: Change flags type to unsigned int in binding mm Fenghua Yu
2020-06-13  0:41 ` [PATCH v2 04/12] docs: x86: Add documentation for SVA (Shared Virtual Addressing) Fenghua Yu
2020-06-13 12:17   ` Lu Baolu
2020-06-15 23:16     ` Fenghua Yu
2020-06-13  0:41 ` [PATCH v2 05/12] x86/cpufeatures: Enumerate ENQCMD and ENQCMDS instructions Fenghua Yu
2020-06-13  0:41 ` [PATCH v2 06/12] x86/fpu/xstate: Add supervisor PASID state for ENQCMD feature Fenghua Yu
2020-06-13  0:41 ` [PATCH v2 07/12] x86/msr-index: Define IA32_PASID MSR Fenghua Yu
2020-06-13  0:41 ` [PATCH v2 08/12] mm: Define pasid in mm Fenghua Yu
2020-06-16  8:28   ` Jean-Philippe Brucker
2020-06-16 15:11     ` Fenghua Yu
2020-06-13  0:41 ` [PATCH v2 09/12] fork: Clear PASID for new mm Fenghua Yu
2020-06-13  0:41 ` [PATCH v2 10/12] x86/process: Clear PASID state for a newly forked/cloned thread Fenghua Yu
2020-06-13  0:41 ` [PATCH v2 11/12] x86/mmu: Allocate/free PASID Fenghua Yu
2020-06-13 13:07   ` Lu Baolu
2020-06-15  2:13   ` Lu Baolu
2020-06-13  0:41 ` [PATCH v2 12/12] x86/traps: Fix up invalid PASID Fenghua Yu
2020-06-15  7:53   ` Peter Zijlstra
2020-06-15  7:56   ` Peter Zijlstra
2020-06-15 15:48     ` Fenghua Yu
2020-06-15 16:03       ` Peter Zijlstra
2020-06-15 17:11         ` Luck, Tony
2020-06-15 18:12         ` Fenghua Yu
2020-06-15 18:31           ` Peter Zijlstra
2020-06-15 18:55             ` Fenghua Yu
2020-06-15 19:09               ` Peter Zijlstra
2020-06-15 20:17                 ` Fenghua Yu
2020-06-15 20:51                   ` Andy Lutomirski
2020-06-15 20:56                     ` Luck, Tony
2020-06-15 21:18                       ` Andy Lutomirski
2020-06-15 21:24                         ` Luck, Tony
2020-06-15 21:53                   ` Peter Zijlstra [this message]
2020-06-16 23:23                 ` Fenghua Yu
2020-06-17  8:31                   ` Peter Zijlstra
2020-06-15 18:19         ` Raj, Ashok
2020-06-15 18:32           ` Peter Zijlstra
2020-06-15  7:52 ` [PATCH v2 00/12] x86: tag application address space for devices Peter Zijlstra
2020-06-15 14:53   ` Fenghua Yu

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