From: Moritz Fischer <mdf@kernel.org>
To: Luca Ceresoli <luca@lucaceresoli.net>
Cc: linux-fpga@vger.kernel.org, Moritz Fischer <mdf@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Michal Simek <michal.simek@xilinx.com>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Anatolij Gustschin <agust@denx.de>
Subject: Re: [PATCH 3/5] fpga manager: xilinx-spi: remove unneeded, mistyped variables
Date: Thu, 18 Jun 2020 18:38:30 -0700 [thread overview]
Message-ID: <20200619013830.GC3685@epycbox.lan> (raw)
In-Reply-To: <20200611211144.9421-3-luca@lucaceresoli.net>
On Thu, Jun 11, 2020 at 11:11:42PM +0200, Luca Ceresoli wrote:
> Using variables does not add readability here: parameters passed
> to udelay*() are obviously in microseconds and their meaning is clear
> from the context.
>
> The type is also wrong, udelay expects an unsigned long.
>
> Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
> ---
> drivers/fpga/xilinx-spi.c | 6 ++----
> 1 file changed, 2 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/fpga/xilinx-spi.c b/drivers/fpga/xilinx-spi.c
> index 79106626c3f8..799ae04301be 100644
> --- a/drivers/fpga/xilinx-spi.c
> +++ b/drivers/fpga/xilinx-spi.c
> @@ -41,8 +41,6 @@ static int xilinx_spi_write_init(struct fpga_manager *mgr,
> const char *buf, size_t count)
> {
> struct xilinx_spi_conf *conf = mgr->priv;
> - const size_t prog_latency_7500us = 7500;
> - const size_t prog_pulse_1us = 1;
>
> if (info->flags & FPGA_MGR_PARTIAL_RECONFIG) {
> dev_err(&mgr->dev, "Partial reconfiguration not supported.\n");
> @@ -51,7 +49,7 @@ static int xilinx_spi_write_init(struct fpga_manager *mgr,
>
> gpiod_set_value(conf->prog_b, 1);
>
> - udelay(prog_pulse_1us); /* min is 500 ns */
> + udelay(1); /* min is 500 ns */
>
> gpiod_set_value(conf->prog_b, 0);
>
> @@ -61,7 +59,7 @@ static int xilinx_spi_write_init(struct fpga_manager *mgr,
> }
>
> /* program latency */
> - usleep_range(prog_latency_7500us, prog_latency_7500us + 100);
> + usleep_range(7500, 7600);
> return 0;
> }
>
> --
> 2.27.0
>
Applied to for-next,
Thanks!
next prev parent reply other threads:[~2020-06-19 1:38 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-11 21:11 [PATCH 1/5] dt-bindings: fpga: xilinx-slave-serial: valid for the 7 Series too Luca Ceresoli
2020-06-11 21:11 ` [PATCH 2/5] fpga manager: xilinx-spi: " Luca Ceresoli
2020-06-19 1:38 ` Moritz Fischer
2020-06-11 21:11 ` [PATCH 3/5] fpga manager: xilinx-spi: remove unneeded, mistyped variables Luca Ceresoli
2020-06-19 1:38 ` Moritz Fischer [this message]
2020-06-11 21:11 ` [PATCH 4/5] dt-bindings: fpga: xilinx-slave-serial: add optional INIT_B GPIO Luca Ceresoli
2020-06-17 22:39 ` Rob Herring
2020-06-18 5:47 ` Luca Ceresoli
2020-06-18 18:07 ` Rob Herring
2020-06-11 21:11 ` [PATCH 5/5] fpga manager: xilinx-spi: check INIT_B pin during write_init Luca Ceresoli
2020-06-16 4:43 ` Moritz Fischer
2020-06-16 4:42 ` [PATCH 1/5] dt-bindings: fpga: xilinx-slave-serial: valid for the 7 Series too Moritz Fischer
2020-06-17 22:38 ` Rob Herring
2020-06-19 1:37 ` Moritz Fischer
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