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Sun, 12 Jul 2020 10:20:23 -0700 (PDT) Date: Sun, 12 Jul 2020 22:50:19 +0530 From: Manivannan Sadhasivam To: Amit Singh Tomar Cc: andre.przywara@arm.com, afaerber@suse.de, sboyd@kernel.org, cristian.ciocaltea@gmail.com, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-actions@lists.infradead.org Subject: Re: [PATCH v5 04/10] clk: actions: Add MMC clock-register reset bits Message-ID: <20200712172019.GF6110@Mani-XPS-13-9360> References: <1593701576-28580-1-git-send-email-amittomer25@gmail.com> <1593701576-28580-5-git-send-email-amittomer25@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1593701576-28580-5-git-send-email-amittomer25@gmail.com> User-Agent: Mutt/1.9.4 (2018-02-28) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Jul 02, 2020 at 08:22:50PM +0530, Amit Singh Tomar wrote: > This commit adds reset bits needed for MMC clock registers present > on Actions S700 SoC. > > Signed-off-by: Amit Singh Tomar Reviewed-by: Manivannan Sadhasivam Thanks, Mani > --- > Changes from v4: > * Reordered it from 03/10 to 04/10. > Changes from v3: > * NO change. > Changes from v2: > * No change. > Changes from v1: > * No change. > Changes from RFC: > * No change. > --- > drivers/clk/actions/owl-s700.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/clk/actions/owl-s700.c b/drivers/clk/actions/owl-s700.c > index a2f34d13fb54..cd60eca7727d 100644 > --- a/drivers/clk/actions/owl-s700.c > +++ b/drivers/clk/actions/owl-s700.c > @@ -577,6 +577,9 @@ static const struct owl_reset_map s700_resets[] = { > [RESET_DSI] = { CMU_DEVRST0, BIT(2) }, > [RESET_CSI] = { CMU_DEVRST0, BIT(13) }, > [RESET_SI] = { CMU_DEVRST0, BIT(14) }, > + [RESET_SD0] = { CMU_DEVRST0, BIT(22) }, > + [RESET_SD1] = { CMU_DEVRST0, BIT(23) }, > + [RESET_SD2] = { CMU_DEVRST0, BIT(24) }, > [RESET_I2C0] = { CMU_DEVRST1, BIT(0) }, > [RESET_I2C1] = { CMU_DEVRST1, BIT(1) }, > [RESET_I2C2] = { CMU_DEVRST1, BIT(2) }, > -- > 2.7.4 >