From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.6 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B22F7C433DF for ; Mon, 13 Jul 2020 09:39:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 8552A206F0 for ; Mon, 13 Jul 2020 09:39:15 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="yh9Pm9P9" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729552AbgGMJjO (ORCPT ); Mon, 13 Jul 2020 05:39:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39466 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729027AbgGMJjN (ORCPT ); Mon, 13 Jul 2020 05:39:13 -0400 Received: from mail-pf1-x444.google.com (mail-pf1-x444.google.com [IPv6:2607:f8b0:4864:20::444]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 66274C061755 for ; Mon, 13 Jul 2020 02:39:13 -0700 (PDT) Received: by mail-pf1-x444.google.com with SMTP id u5so5764462pfn.7 for ; Mon, 13 Jul 2020 02:39:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=skXD+wsQgKq4LXd9xCnrPvK7KZqTAPrAbDnvMV4BILs=; b=yh9Pm9P9Gp+QKQfxeQtuY1E1Hp14L5t3EfCVWNCaO52OM6gUUeJFFQTyK8rEyutk0H BMoHaR7zBcRyTShlru8V/TjqVRzrZV4+B5MeBPC/AGQ5A+jfZAy8UEt43EkfDOpZu4V9 01nPZo5Akte8gAWlUJLgaa0gem1j28CIN8cD49/resMQr46y6OMYdUiK3whKdoa5Uvy5 +y3ZSH/GpTj9Dn49PXWKm4+8ovC5Z15loSyOKMRDKhb71xCepwG0+P+RLVfWt5RjYGZr eyLaucHvluqtxjaz0JZV9dp8AXvH8VzJNZTRd03H+RiGwVDyP5C9sdB0gGbOaJ4/YDFw iing== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=skXD+wsQgKq4LXd9xCnrPvK7KZqTAPrAbDnvMV4BILs=; b=E1qJfAYNB3zVeCzn1T3C23t1TCu1o84fnWMOG5B0Wkhrz1FY35kvlpyrFzXFdGcRzg vKq+7y+p7SohuO9MgIFUAzN+xZ2eIRHXN/d6TCFp9PGaqhc2miY4mw1CxxG1QQyJ+2y8 +QZbvMaXaqA2BnhXC40ePo2TCX6LQRcr6IYQSOtFFvD5HW1PTzX4euez0cCEwj24tBai gPv/KRZcmTD/+amSLOnJbkT1+iVA+Rzkj+QH7RwgYZRN6FjjxnvM5i+vykMq2kXYtrHc mUaBDtnMZDnSDTW7nLRaahfhRdfLRVfcH4VehDZb2nLP8ZGzMKzZ9nr39G8d+0m12nNP DVtQ== X-Gm-Message-State: AOAM532FBPIoQdXJlYRyO+ygLFmjzYR3o4KIGvzjg3Cd04U/OIcAARS1 h0b4ZMMML5AA8VKiXYu382RgOg== X-Google-Smtp-Source: ABdhPJyl0zjLReOR/+Xr6FqTuxKWo4RJ4CVE+9dKiMkEDH87gGW8e4TOm3obgjWYwEX/7dZWcfxkkA== X-Received: by 2002:a63:3d01:: with SMTP id k1mr65845600pga.71.1594633152842; Mon, 13 Jul 2020 02:39:12 -0700 (PDT) Received: from localhost ([122.172.34.142]) by smtp.gmail.com with ESMTPSA id i13sm14062787pjd.33.2020.07.13.02.39.11 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Mon, 13 Jul 2020 02:39:11 -0700 (PDT) Date: Mon, 13 Jul 2020 15:09:09 +0530 From: Viresh Kumar To: "Andrew-sh.Cheng" Cc: MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Rob Herring , Mark Rutland , Matthias Brugger , "Rafael J. Wysocki" , Nishanth Menon , Stephen Boyd , Liam Girdwood , Mark Brown , linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, srv_heupstream@mediatek.com Subject: Re: [PATCH v7 2/8] cpufreq: mediatek: Enable clock and regulator Message-ID: <20200713093909.676v7wxjzsz4vbxv@vireshk-i7> References: <1594348284-14199-1-git-send-email-andrew-sh.cheng@mediatek.com> <1594348284-14199-3-git-send-email-andrew-sh.cheng@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1594348284-14199-3-git-send-email-andrew-sh.cheng@mediatek.com> User-Agent: NeoMutt/20180716-391-311a52 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 10-07-20, 10:31, Andrew-sh.Cheng wrote: > From: "Andrew-sh.Cheng" > > Need to enable regulator, > so that the max/min requested value will be recorded > even it is not applied right away. > > Intermediate clock is not always enabled by ccf in different projects, > so cpufreq should enable it by itself. > > Change-Id: I9f4c8b1ea793794f5f9cdc65427daad1393f5df8 You are on V7 right now, these should have been gone long back. > Signed-off-by: Andrew-sh.Cheng > --- > drivers/cpufreq/mediatek-cpufreq.c | 33 +++++++++++++++++++++++++++++---- > 1 file changed, 29 insertions(+), 4 deletions(-) > > diff --git a/drivers/cpufreq/mediatek-cpufreq.c b/drivers/cpufreq/mediatek-cpufreq.c > index 0c98dd08273d..4b479c110cc9 100644 > --- a/drivers/cpufreq/mediatek-cpufreq.c > +++ b/drivers/cpufreq/mediatek-cpufreq.c > @@ -350,6 +350,11 @@ static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu) > ret = PTR_ERR(proc_reg); > goto out_free_resources; > } > + ret = regulator_enable(proc_reg); > + if (ret) { > + pr_warn("enable vproc for cpu%d fail\n", cpu); > + goto out_free_resources; > + } This is already done by the OPP core now. -- viresh