From: kan.liang@linux.intel.com
To: peterz@infradead.org, acme@redhat.com, mingo@kernel.org,
linux-kernel@vger.kernel.org
Cc: jolsa@kernel.org, eranian@google.com,
alexander.shishkin@linux.intel.com, ak@linux.intel.com,
Kan Liang <kan.liang@linux.intel.com>
Subject: [PATCH V6 06/14] perf/x86/intel: Use switch in intel_pmu_disable/enable_event
Date: Fri, 17 Jul 2020 07:05:46 -0700 [thread overview]
Message-ID: <20200717140554.22863-7-kan.liang@linux.intel.com> (raw)
In-Reply-To: <20200717140554.22863-1-kan.liang@linux.intel.com>
From: Kan Liang <kan.liang@linux.intel.com>
Many items are checked in the intel_pmu_disable/enable_event. More items
will be added later, e.g. perf metrics events.
Use switch, which is more efficient, to replace the if-else.
If the idx is invalid, print a warning.
For the case INTEL_PMC_IDX_FIXED_BTS in intel_pmu_disable_event, don't
need to check the event->attr.precise_ip. Use return for the case.
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
---
arch/x86/events/intel/core.c | 36 ++++++++++++++++++++++++++++--------
1 file changed, 28 insertions(+), 8 deletions(-)
diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index ac1408fe1aee..2b1701c08f46 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -2180,17 +2180,28 @@ static void intel_pmu_disable_event(struct perf_event *event)
struct hw_perf_event *hwc = &event->hw;
int idx = hwc->idx;
- if (idx < INTEL_PMC_IDX_FIXED) {
+ switch (idx) {
+ case 0 ... INTEL_PMC_IDX_FIXED - 1:
intel_clear_masks(event, idx);
x86_pmu_disable_event(event);
- } else if (idx < INTEL_PMC_IDX_FIXED_BTS) {
+ break;
+ case INTEL_PMC_IDX_FIXED ... INTEL_PMC_IDX_FIXED_BTS - 1:
intel_clear_masks(event, idx);
intel_pmu_disable_fixed(event);
- } else if (idx == INTEL_PMC_IDX_FIXED_BTS) {
+ break;
+ case INTEL_PMC_IDX_FIXED_BTS:
intel_pmu_disable_bts();
intel_pmu_drain_bts_buffer();
- } else if (idx == INTEL_PMC_IDX_FIXED_VLBR)
+ return;
+ case INTEL_PMC_IDX_FIXED_VLBR:
intel_clear_masks(event, idx);
+ break;
+ default:
+ intel_clear_masks(event, idx);
+ pr_warn("Failed to disable the event with invalid index %d\n",
+ idx);
+ return;
+ }
/*
* Needs to be called after x86_pmu_disable_event,
@@ -2262,18 +2273,27 @@ static void intel_pmu_enable_event(struct perf_event *event)
if (unlikely(event->attr.precise_ip))
intel_pmu_pebs_enable(event);
- if (idx < INTEL_PMC_IDX_FIXED) {
+ switch (idx) {
+ case 0 ... INTEL_PMC_IDX_FIXED - 1:
intel_set_masks(event, idx);
__x86_pmu_enable_event(hwc, ARCH_PERFMON_EVENTSEL_ENABLE);
- } else if (idx < INTEL_PMC_IDX_FIXED_BTS) {
+ break;
+ case INTEL_PMC_IDX_FIXED ... INTEL_PMC_IDX_FIXED_BTS - 1:
intel_set_masks(event, idx);
intel_pmu_enable_fixed(event);
- } else if (idx == INTEL_PMC_IDX_FIXED_BTS) {
+ break;
+ case INTEL_PMC_IDX_FIXED_BTS:
if (!__this_cpu_read(cpu_hw_events.enabled))
return;
intel_pmu_enable_bts(hwc->config);
- } else if (idx == INTEL_PMC_IDX_FIXED_VLBR)
+ break;
+ case INTEL_PMC_IDX_FIXED_VLBR:
intel_set_masks(event, idx);
+ break;
+ default:
+ pr_warn("Failed to enable the event with invalid index %d\n",
+ idx);
+ }
}
static void intel_pmu_add_event(struct perf_event *event)
--
2.17.1
next prev parent reply other threads:[~2020-07-17 14:08 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-17 14:05 [PATCH V6 00/14] TopDown metrics support for Icelake kan.liang
2020-07-17 14:05 ` [PATCH V6 01/14] perf/x86: Use event_base_rdpmc for the RDPMC userspace support kan.liang
2020-07-17 14:05 ` [PATCH V6 02/14] perf/x86/intel: Name the global status bit in NMI handler kan.liang
2020-07-17 14:05 ` [PATCH V6 03/14] perf/x86/intel: Introduce the fourth fixed counter kan.liang
2020-07-20 16:20 ` Peter Zijlstra
2020-07-20 18:22 ` Liang, Kan
2020-07-17 14:05 ` [PATCH V6 04/14] perf/x86/intel: Move BTS index to 47 kan.liang
2020-07-17 14:05 ` [PATCH V6 05/14] perf/x86/intel: Fix the name of perf METRICS kan.liang
2020-07-17 14:05 ` kan.liang [this message]
2020-07-20 16:22 ` [PATCH V6 06/14] perf/x86/intel: Use switch in intel_pmu_disable/enable_event Peter Zijlstra
2020-07-20 19:02 ` Liang, Kan
2020-07-17 14:05 ` [PATCH V6 07/14] perf/x86/intel: Generic support for hardware TopDown metrics kan.liang
2020-07-20 17:41 ` Peter Zijlstra
2020-07-20 18:11 ` Liang, Kan
2020-07-21 9:43 ` Peter Zijlstra
2020-07-21 14:05 ` Liang, Kan
2020-07-21 14:25 ` peterz
2020-07-17 14:05 ` [PATCH V6 08/14] perf/x86: Add a macro for RDPMC offset of fixed counters kan.liang
2020-07-17 14:05 ` [PATCH V6 09/14] perf/x86/intel: Support TopDown metrics on Ice Lake kan.liang
2020-07-21 12:40 ` Peter Zijlstra
2020-07-21 14:23 ` Liang, Kan
2020-07-21 14:31 ` peterz
2020-07-21 15:50 ` Liang, Kan
2020-07-21 17:38 ` Andi Kleen
2020-07-21 19:20 ` Peter Zijlstra
2020-07-17 14:05 ` [PATCH V6 10/14] perf/x86/intel: Support per-thread RDPMC TopDown metrics kan.liang
2020-07-17 14:05 ` [PATCH V6 11/14] perf/x86/intel: Disable sample-read the slots and metrics events kan.liang
2020-07-21 13:10 ` Peter Zijlstra
2020-07-21 16:07 ` Liang, Kan
2020-07-21 19:18 ` Peter Zijlstra
2020-07-22 19:26 ` Liang, Kan
2020-07-17 14:05 ` [PATCH V6 12/14] perf, tools, stat: Support new per thread TopDown metrics kan.liang
2020-07-17 14:05 ` [PATCH V6 13/14] perf, tools, stat: Check Topdown Metric group kan.liang
2020-07-17 14:05 ` [PATCH V6 14/14] perf, tools: Add documentation for topdown metrics kan.liang
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