From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5A018C433E7 for ; Mon, 20 Jul 2020 16:16:03 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3563F22CF6 for ; Mon, 20 Jul 2020 16:16:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1595261763; bh=zVakChvhnunGp+SzAPVKRY/ExakFe2p7dY0/6aJ6K2c=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=PZbSRc54ciU0XlIdz1RBWgqru5yCGNpw1dwuuDAsJAeaDA7KU6GYOVnyGasTOnr9G uRyBfmyYL95pDlV+AsmivHqeOYMNq87bU1OTba7PKkpizM5LJc+3T9YFWX+BcJmP70 1JH/Vh0/Ix4LYqZUygCUObQPKibqWbaE4XmkX/T0= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388489AbgGTQQB (ORCPT ); Mon, 20 Jul 2020 12:16:01 -0400 Received: from mail.kernel.org ([198.145.29.99]:57010 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388474AbgGTQP7 (ORCPT ); Mon, 20 Jul 2020 12:15:59 -0400 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id EFC0C206E9; Mon, 20 Jul 2020 16:15:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1595261758; bh=zVakChvhnunGp+SzAPVKRY/ExakFe2p7dY0/6aJ6K2c=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=HCDBLw/3kHR7RXdsI3MFiDO6AW4q+wowB59HRoXNRD4LX43xw6eczm7yKRFbgS2fX 5EP2lVNvYnHkLp1Fc7OTFsbEH0kgOmrXQv8lUgLzVNqz60Yop2S6HTpa6omlI6Gp8q KMjZa0ZqTtpEAZ8QUg5JSUU4QLmEOM8CeH1q4yYk= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Chris Wilson , Tvrtko Ursulin , Jani Nikula Subject: [PATCH 5.7 231/244] drm/i915/gt: Only swap to a random sibling once upon creation Date: Mon, 20 Jul 2020 17:38:22 +0200 Message-Id: <20200720152836.830139409@linuxfoundation.org> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200720152825.863040590@linuxfoundation.org> References: <20200720152825.863040590@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Chris Wilson commit 110f9efa858f584c6bed177cd48d0c0f526940e1 upstream. The danger in switching at random upon intel_context_pin is that the context may still actually be inflight, as it will not be scheduled out until a context switch after it is complete -- that may be a long time after we do a final intel_context_unpin. Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/2118 Fixes: 6d06779e8672 ("drm/i915: Load balancing across a virtual engine") Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin Cc: # v5.3+ Reviewed-by: Tvrtko Ursulin Link: https://patchwork.freedesktop.org/patch/msgid/20200713160549.17344-1-chris@chris-wilson.co.uk (cherry picked from commit 90a987205c6cf74116a102ed446d22d92cdaf915) Signed-off-by: Jani Nikula Signed-off-by: Greg Kroah-Hartman --- drivers/gpu/drm/i915/gt/intel_lrc.c | 18 ++++-------------- 1 file changed, 4 insertions(+), 14 deletions(-) --- a/drivers/gpu/drm/i915/gt/intel_lrc.c +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c @@ -4897,13 +4897,8 @@ static void virtual_engine_initial_hint( * typically be the first we inspect for submission. */ swp = prandom_u32_max(ve->num_siblings); - if (!swp) - return; - - swap(ve->siblings[swp], ve->siblings[0]); - if (!intel_engine_has_relative_mmio(ve->siblings[0])) - virtual_update_register_offsets(ve->context.lrc_reg_state, - ve->siblings[0]); + if (swp) + swap(ve->siblings[swp], ve->siblings[0]); } static int virtual_context_alloc(struct intel_context *ce) @@ -4916,15 +4911,9 @@ static int virtual_context_alloc(struct static int virtual_context_pin(struct intel_context *ce) { struct virtual_engine *ve = container_of(ce, typeof(*ve), context); - int err; /* Note: we must use a real engine class for setting up reg state */ - err = __execlists_context_pin(ce, ve->siblings[0]); - if (err) - return err; - - virtual_engine_initial_hint(ve); - return 0; + return __execlists_context_pin(ce, ve->siblings[0]); } static void virtual_context_enter(struct intel_context *ce) @@ -5270,6 +5259,7 @@ intel_execlists_create_virtual(struct in ve->base.flags |= I915_ENGINE_IS_VIRTUAL; + virtual_engine_initial_hint(ve); return &ve->context; err_put: