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[198.145.64.163]) by smtp.gmail.com with ESMTPSA id b15sm4060054pje.52.2020.07.21.14.47.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 Jul 2020 14:47:18 -0700 (PDT) Date: Tue, 21 Jul 2020 14:47:17 -0700 From: Kees Cook To: Thomas Gleixner Cc: LKML , x86@kernel.org, linux-arch@vger.kernel.org, Will Deacon , Arnd Bergmann , Mark Rutland , Keno Fischer , Paolo Bonzini , kvm@vger.kernel.org, Gabriel Krisman Bertazi Subject: Re: [patch V4 10/15] x86/entry: Use generic syscall entry function Message-ID: <202007211440.BEF76E2@keescook> References: <20200721105706.030914876@linutronix.de> <20200721110809.325060396@linutronix.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200721110809.325060396@linutronix.de> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Jul 21, 2020 at 12:57:16PM +0200, Thomas Gleixner wrote: > Replace the syscall entry work handling with the generic version. Provide > the necessary helper inlines to handle the real architecture specific > parts, e.g. ptrace. > > Use a temporary define for idtentry_enter_user which will be cleaned up > seperately. > > Signed-off-by: Thomas Gleixner Reviewed-by: Kees Cook Though, notes and a comment below... > +/* Check that the stack and regs on entry from user mode are sane. */ > +static __always_inline void arch_check_user_regs(struct pt_regs *regs) > +{ > + if (IS_ENABLED(CONFIG_DEBUG_ENTRY)) { > + /* > + * Make sure that the entry code gave us a sensible EFLAGS > + * register. Native because we want to check the actual CPU > + * state, not the interrupt state as imagined by Xen. > + */ > + unsigned long flags = native_save_fl(); > + WARN_ON_ONCE(flags & (X86_EFLAGS_AC | X86_EFLAGS_DF | > + X86_EFLAGS_NT)); push, pop, bit test > + > + /* We think we came from user mode. Make sure pt_regs agrees. */ > + WARN_ON_ONCE(!user_mode(regs)); memory deref, bit test > + > + /* > + * All entries from user mode (except #DF) should be on the > + * normal thread stack and should have user pt_regs in the > + * correct location. > + */ > + WARN_ON_ONCE(!on_thread_stack()); per-cpu deref, subtract, test > + WARN_ON_ONCE(regs != task_pt_regs(current)); memory deref, test > + } > +} This doesn't look very expensive, and they certain indicate really bad conditions. Does this need to be behind a CONFIG? (Whatever the answer, we can probably make those changes in a later series -- some of these also look not arch-specific...) -- Kees Cook