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From: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
To: Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@kernel.org>, Borislav Petkov <bp@suse.de>,
	Andy Lutomirski <luto@kernel.org>,
	x86@kernel.org
Cc: Dave Hansen <dave.hansen@intel.com>,
	Tony Luck <tony.luck@intel.com>,
	Cathy Zhang <cathy.zhang@intel.com>,
	Fenghua Yu <fenghua.yu@intel.com>,
	"H. Peter Anvin" <hpa@zytor.com>,
	Kyung Min Park <kyung.min.park@intel.com>,
	"Peter Zijlstra (Intel)" <peterz@infradead.org>,
	"Ravi V. Shankar" <ravi.v.shankar@intel.com>,
	Sean Christopherson <sean.j.christopherson@intel.com>,
	linux-kernel@vger.kernel.org,
	Ricardo Neri <ricardo.neri@intel.com>,
	Ricardo Neri <ricardo.neri-calderon@linux.intel.com>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	linux-edac@vger.kernel.org
Subject: [PATCH 3/4] x86/cpu: Refactor sync_core() for readability
Date: Sun, 26 Jul 2020 21:31:31 -0700	[thread overview]
Message-ID: <20200727043132.15082-4-ricardo.neri-calderon@linux.intel.com> (raw)
In-Reply-To: <20200727043132.15082-1-ricardo.neri-calderon@linux.intel.com>

Instead of having #ifdef/#endif blocks inside sync_core() for X86_64 and
X86_32, implement the new function iret_to_self() with two versions.

In this manner, avoid having to use even more more #ifdef/#endif blocks
when adding support for SERIALIZE in sync_core().

Cc: Andy Lutomirski <luto@kernel.org>
Cc: Cathy Zhang <cathy.zhang@intel.com>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Kyung Min Park <kyung.min.park@intel.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: "Ravi V. Shankar" <ravi.v.shankar@intel.com>
Cc: Sean Christopherson <sean.j.christopherson@intel.com>
Cc: linux-edac@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Co-developed-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
---
---
 arch/x86/include/asm/special_insns.h |  1 -
 arch/x86/include/asm/sync_core.h     | 56 ++++++++++++++++------------
 2 files changed, 32 insertions(+), 25 deletions(-)

diff --git a/arch/x86/include/asm/special_insns.h b/arch/x86/include/asm/special_insns.h
index eb8e781c4353..59a3e13204c3 100644
--- a/arch/x86/include/asm/special_insns.h
+++ b/arch/x86/include/asm/special_insns.h
@@ -234,7 +234,6 @@ static inline void clwb(volatile void *__p)
 
 #define nop() asm volatile ("nop")
 
-
 #endif /* __KERNEL__ */
 
 #endif /* _ASM_X86_SPECIAL_INSNS_H */
diff --git a/arch/x86/include/asm/sync_core.h b/arch/x86/include/asm/sync_core.h
index 9c5573f2c333..fdb5b356e59b 100644
--- a/arch/x86/include/asm/sync_core.h
+++ b/arch/x86/include/asm/sync_core.h
@@ -6,6 +6,37 @@
 #include <asm/processor.h>
 #include <asm/cpufeature.h>
 
+#ifdef CONFIG_X86_32
+static inline void iret_to_self(void)
+{
+	asm volatile (
+		"pushfl\n\t"
+		"pushl %%cs\n\t"
+		"pushl $1f\n\t"
+		"iret\n\t"
+		"1:"
+		: ASM_CALL_CONSTRAINT : : "memory");
+}
+#else
+static inline void iret_to_self(void)
+{
+	unsigned int tmp;
+
+	asm volatile (
+		"mov %%ss, %0\n\t"
+		"pushq %q0\n\t"
+		"pushq %%rsp\n\t"
+		"addq $8, (%%rsp)\n\t"
+		"pushfq\n\t"
+		"mov %%cs, %0\n\t"
+		"pushq %q0\n\t"
+		"pushq $1f\n\t"
+		"iretq\n\t"
+		"1:"
+		: "=&r" (tmp), ASM_CALL_CONSTRAINT : : "cc", "memory");
+}
+#endif /* CONFIG_X86_32 */
+
 /*
  * This function forces the icache and prefetched instruction stream to
  * catch up with reality in two very specific cases:
@@ -44,30 +75,7 @@ static inline void sync_core(void)
 	 * Like all of Linux's memory ordering operations, this is a
 	 * compiler barrier as well.
 	 */
-#ifdef CONFIG_X86_32
-	asm volatile (
-		"pushfl\n\t"
-		"pushl %%cs\n\t"
-		"pushl $1f\n\t"
-		"iret\n\t"
-		"1:"
-		: ASM_CALL_CONSTRAINT : : "memory");
-#else
-	unsigned int tmp;
-
-	asm volatile (
-		"mov %%ss, %0\n\t"
-		"pushq %q0\n\t"
-		"pushq %%rsp\n\t"
-		"addq $8, (%%rsp)\n\t"
-		"pushfq\n\t"
-		"mov %%cs, %0\n\t"
-		"pushq %q0\n\t"
-		"pushq $1f\n\t"
-		"iretq\n\t"
-		"1:"
-		: "=&r" (tmp), ASM_CALL_CONSTRAINT : : "cc", "memory");
-#endif
+	iret_to_self();
 }
 
 /*
-- 
2.17.1


  parent reply	other threads:[~2020-07-27  4:32 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-27  4:31 [PATCH 0/4] x86/cpu: Use SERIALIZE in sync_core() Ricardo Neri
2020-07-27  4:31 ` [PATCH 1/4] x86/cpufeatures: Add enumeration for SERIALIZE instruction Ricardo Neri
2020-07-27 12:46   ` [tip: x86/cpu] " tip-bot2 for Ricardo Neri
2020-07-27  4:31 ` [PATCH 2/4] x86/cpu: Relocate sync_core() to sync_core.h Ricardo Neri
2020-07-27 12:46   ` [tip: x86/cpu] " tip-bot2 for Ricardo Neri
2020-07-27  4:31 ` Ricardo Neri [this message]
2020-07-27 12:46   ` [tip: x86/cpu] x86/cpu: Refactor sync_core() for readability tip-bot2 for Ricardo Neri
2020-07-27  4:31 ` [PATCH 4/4] x86/cpu: Use SERIALIZE in sync_core() when available Ricardo Neri
2020-07-27  5:55   ` hpa
2020-07-27  6:00     ` hpa
2020-07-27  8:36     ` peterz
2020-07-27 12:49       ` hpa
2020-07-27 13:05         ` peterz
2020-07-27 13:30           ` peterz
2020-07-28  4:41             ` Ricardo Neri
2020-07-28  8:50               ` peterz
2020-07-27 16:27     ` Luck, Tony
2020-07-27  8:20   ` peterz
2020-07-27 12:47     ` hpa
2020-07-28  0:55       ` Ricardo Neri
2020-07-28  0:36     ` Ricardo Neri
2020-07-27  8:23   ` peterz
2020-07-27 11:07 ` [PATCH 0/4] x86/cpu: Use SERIALIZE in sync_core() Ingo Molnar
2020-07-28  0:32   ` Ricardo Neri

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