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From: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
To: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org
Cc: Steve Longerbeam <slongerbeam@gmail.com>,
	Mauro Carvalho Chehab <mchehab@kernel.org>,
	Maxime Ripard <maxime@cerno.tech>,
	Hans Verkuil <hverkuil@xs4all.nl>,
	Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Subject: [PATCH] media: ov5640: Correct Bit Div register in clock tree diagram
Date: Mon,  3 Aug 2020 11:06:58 +0200	[thread overview]
Message-ID: <20200803090658.10073-1-paul.kocialkowski@bootlin.com> (raw)

Although the code is correct and doing the right thing, the clock diagram
showed the wrong register for the bit divider, which had me doubting the
understanding of the tree. Fix this to avoid doubts in the future.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
---
 drivers/media/i2c/ov5640.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/media/i2c/ov5640.c b/drivers/media/i2c/ov5640.c
index 854031f0b64a..fe08a45b0426 100644
--- a/drivers/media/i2c/ov5640.c
+++ b/drivers/media/i2c/ov5640.c
@@ -751,7 +751,7 @@ static int ov5640_mod_reg(struct ov5640_dev *sensor, u16 reg,
  *               +->| PLL Root Div | - reg 0x3037, bit 4
  *                  +-+------------+
  *                    |  +---------+
- *                    +->| Bit Div | - reg 0x3035, bits 0-3
+ *                    +->| Bit Div | - reg 0x3034, bits 0-3
  *                       +-+-------+
  *                         |  +-------------+
  *                         +->| SCLK Div    | - reg 0x3108, bits 0-1
-- 
2.26.2


             reply	other threads:[~2020-08-03  9:07 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-08-03  9:06 Paul Kocialkowski [this message]
2020-08-05 12:51 ` [PATCH] media: ov5640: Correct Bit Div register in clock tree diagram Jacopo Mondi
2020-08-13 21:51   ` Sakari Ailus

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