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* [PATCH 00/13] MIPS: Convert Ingenic to a generic board
@ 2020-08-03 17:01 Paul Cercueil
  2020-08-03 17:01 ` [PATCH 01/13] MIPS: cpu-probe: Set Ingenic's writecombine to _CACHE_CACHABLE_WA Paul Cercueil
                   ` (13 more replies)
  0 siblings, 14 replies; 27+ messages in thread
From: Paul Cercueil @ 2020-08-03 17:01 UTC (permalink / raw)
  To: Thomas Bogendoerfer
  Cc: Paul Burton, Krzysztof Kozlowski, 周琰杰,
	od, linux-kernel, linux-mips, Paul Cercueil

Hi Thomas & list,

Here is a set of patches for 5.10 (no rush) to move Ingenic support from
arch/mips/jz4740/ to arch/mips/generic/.

There are some Kconfig changes that I think should be reviewed in detail
to avoid breakages elsewhere. The idea behind these changes is to allow
the Ingenic "generic" code to be built in a non-generic kernel, since
generic kernels bring lots of dependencies which result in a +7% size
increase.

Support for booting the generic kernel with a built-in and/or appended
devicetree, as well as support for compressed (vmlinuz) kernels, has
been added as well.

Cheers,
-Paul

Paul Cercueil (13):
  MIPS: cpu-probe: Set Ingenic's writecombine to _CACHE_CACHABLE_WA
  MIPS: cpu-probe: Mark XBurst CPU as having vtagged caches
  MIPS: cpu-probe: ingenic: Fix broken BUG_ON
  MIPS: Kconfig: add MIPS_GENERIC_KERNEL symbol
  MIPS: machine: Add get_system_type callback
  MIPS: generic: Call the machine's .get_system_type callback if
    provided
  MIPS: generic: Support booting with built-in or appended DTB
  MIPS: generic: Add support for zboot
  MIPS: generic: Increase NR_IRQS to 256
  MIPS: generic: Add support for Ingenic SoCs
  MIPS: jz4740: Drop folder
  MIPS: configs: Regenerate configs of Ingenic boards
  MAINTAINERS: Update paths to Ingenic platform code

 MAINTAINERS                                   |   4 +-
 arch/mips/Kbuild.platforms                    |   1 -
 arch/mips/Kconfig                             |  43 ++++--
 arch/mips/configs/ci20_defconfig              |   4 +-
 arch/mips/configs/cu1000-neo_defconfig        |  16 +-
 arch/mips/configs/gcw0_defconfig              |   2 +-
 arch/mips/configs/qi_lb60_defconfig           |   5 +-
 arch/mips/configs/rs90_defconfig              |   4 +-
 arch/mips/generic/Kconfig                     |   8 +-
 arch/mips/generic/Makefile                    |   2 +-
 arch/mips/generic/Platform                    |   1 +
 arch/mips/generic/board-ingenic.c             | 108 +++++++++++++
 arch/mips/generic/init.c                      |  28 +++-
 arch/mips/generic/proc.c                      |  25 ---
 arch/mips/include/asm/mach-generic/irq.h      |   2 +-
 .../asm/mach-jz4740/cpu-feature-overrides.h   |  50 ------
 arch/mips/include/asm/mach-jz4740/irq.h       |  13 --
 arch/mips/include/asm/machine.h               |   1 +
 arch/mips/include/asm/pgtable-bits.h          |   5 -
 arch/mips/{jz4740 => ingenic}/Kconfig         |  16 +-
 arch/mips/jz4740/Makefile                     |   9 --
 arch/mips/jz4740/Platform                     |   3 -
 arch/mips/jz4740/setup.c                      | 145 ------------------
 arch/mips/kernel/cpu-probe.c                  |   8 +-
 24 files changed, 198 insertions(+), 305 deletions(-)
 create mode 100644 arch/mips/generic/board-ingenic.c
 delete mode 100644 arch/mips/generic/proc.c
 delete mode 100644 arch/mips/include/asm/mach-jz4740/cpu-feature-overrides.h
 delete mode 100644 arch/mips/include/asm/mach-jz4740/irq.h
 rename arch/mips/{jz4740 => ingenic}/Kconfig (91%)
 delete mode 100644 arch/mips/jz4740/Makefile
 delete mode 100644 arch/mips/jz4740/Platform
 delete mode 100644 arch/mips/jz4740/setup.c

-- 
2.27.0


^ permalink raw reply	[flat|nested] 27+ messages in thread

* [PATCH 01/13] MIPS: cpu-probe: Set Ingenic's writecombine to _CACHE_CACHABLE_WA
  2020-08-03 17:01 [PATCH 00/13] MIPS: Convert Ingenic to a generic board Paul Cercueil
@ 2020-08-03 17:01 ` Paul Cercueil
  2020-08-03 17:01 ` [PATCH 02/13] MIPS: cpu-probe: Mark XBurst CPU as having vtagged caches Paul Cercueil
                   ` (12 subsequent siblings)
  13 siblings, 0 replies; 27+ messages in thread
From: Paul Cercueil @ 2020-08-03 17:01 UTC (permalink / raw)
  To: Thomas Bogendoerfer
  Cc: Paul Burton, Krzysztof Kozlowski, 周琰杰,
	od, linux-kernel, linux-mips, Paul Cercueil

Previously, in cpu_probe_ingenic(), c->writecombine was set to
_CACHE_UNCACHED_ACCELERATED, but this macro was defined differently when
CONFIG_MACH_INGENIC was set. This made it impossible to support multiple
CPUs.

Address this issue by setting c->writecombine to _CACHE_CACHABLE_WA
directly and removing the dependency on CONFIG_MACH_INGENIC.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
---
 arch/mips/include/asm/pgtable-bits.h | 5 -----
 arch/mips/kernel/cpu-probe.c         | 3 ++-
 2 files changed, 2 insertions(+), 6 deletions(-)

diff --git a/arch/mips/include/asm/pgtable-bits.h b/arch/mips/include/asm/pgtable-bits.h
index e26dc41a8a68..2362842ee2b5 100644
--- a/arch/mips/include/asm/pgtable-bits.h
+++ b/arch/mips/include/asm/pgtable-bits.h
@@ -249,11 +249,6 @@ static inline uint64_t pte_to_entrylo(unsigned long pte_val)
 
 #define _CACHE_CACHABLE_NONCOHERENT (5<<_CACHE_SHIFT)
 
-#elif defined(CONFIG_MACH_INGENIC)
-
-/* Ingenic uses the WA bit to achieve write-combine memory writes */
-#define _CACHE_UNCACHED_ACCELERATED (1<<_CACHE_SHIFT)
-
 #endif
 
 #ifndef _CACHE_CACHABLE_NO_WA
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index e2955f1f6316..a18f3611fa5e 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -2169,8 +2169,9 @@ static inline void cpu_probe_ingenic(struct cpuinfo_mips *c, unsigned int cpu)
 
 	/* XBurst®1 with MXU2.0 SIMD ISA */
 	case PRID_IMP_XBURST_REV2:
+		/* Ingenic uses the WA bit to achieve write-combine memory writes */
+		c->writecombine = _CACHE_CACHABLE_WA;
 		c->cputype = CPU_XBURST;
-		c->writecombine = _CACHE_UNCACHED_ACCELERATED;
 		__cpu_name[cpu] = "Ingenic XBurst";
 		break;
 
-- 
2.27.0


^ permalink raw reply related	[flat|nested] 27+ messages in thread

* [PATCH 02/13] MIPS: cpu-probe: Mark XBurst CPU as having vtagged caches
  2020-08-03 17:01 [PATCH 00/13] MIPS: Convert Ingenic to a generic board Paul Cercueil
  2020-08-03 17:01 ` [PATCH 01/13] MIPS: cpu-probe: Set Ingenic's writecombine to _CACHE_CACHABLE_WA Paul Cercueil
@ 2020-08-03 17:01 ` Paul Cercueil
  2020-08-03 17:01 ` [PATCH 03/13] MIPS: cpu-probe: ingenic: Fix broken BUG_ON Paul Cercueil
                   ` (11 subsequent siblings)
  13 siblings, 0 replies; 27+ messages in thread
From: Paul Cercueil @ 2020-08-03 17:01 UTC (permalink / raw)
  To: Thomas Bogendoerfer
  Cc: Paul Burton, Krzysztof Kozlowski, 周琰杰,
	od, linux-kernel, linux-mips, Paul Cercueil

XBurst CPUs present in Ingenic SoCs have virtually tagged caches,
according to the <cpu-features-override.h> header.

Add that information to cpu_probe_ingenic().

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
---
 arch/mips/kernel/cpu-probe.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index a18f3611fa5e..a07e66a6e063 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -2125,6 +2125,9 @@ static inline void cpu_probe_ingenic(struct cpuinfo_mips *c, unsigned int cpu)
 	c->options &= ~MIPS_CPU_COUNTER;
 	BUG_ON(!__builtin_constant_p(cpu_has_counter) || cpu_has_counter);
 
+	/* XBurst has virtually tagged icache */
+	c->icache.flags |= MIPS_CACHE_VTAG;
+
 	switch (c->processor_id & PRID_IMP_MASK) {
 
 	/* XBurst®1 with MXU1.0/MXU1.1 SIMD ISA */
-- 
2.27.0


^ permalink raw reply related	[flat|nested] 27+ messages in thread

* [PATCH 03/13] MIPS: cpu-probe: ingenic: Fix broken BUG_ON
  2020-08-03 17:01 [PATCH 00/13] MIPS: Convert Ingenic to a generic board Paul Cercueil
  2020-08-03 17:01 ` [PATCH 01/13] MIPS: cpu-probe: Set Ingenic's writecombine to _CACHE_CACHABLE_WA Paul Cercueil
  2020-08-03 17:01 ` [PATCH 02/13] MIPS: cpu-probe: Mark XBurst CPU as having vtagged caches Paul Cercueil
@ 2020-08-03 17:01 ` Paul Cercueil
  2020-08-03 17:01 ` [PATCH 04/13] MIPS: Kconfig: add MIPS_GENERIC_KERNEL symbol Paul Cercueil
                   ` (10 subsequent siblings)
  13 siblings, 0 replies; 27+ messages in thread
From: Paul Cercueil @ 2020-08-03 17:01 UTC (permalink / raw)
  To: Thomas Bogendoerfer
  Cc: Paul Burton, Krzysztof Kozlowski, 周琰杰,
	od, linux-kernel, linux-mips, Paul Cercueil

The previous code was doing:
BUG_ON(!__builtin_constant_p(cpu_has_counter) || cpu_has_counter);

This only worked as the "cpu_has_counter" macro was overridden in
<cpu-feature-overrides.h>. The default "cpu_has_counter" macro is
non-constant, which triggered the BUG_ON() independently of the value
returned by the macro.

What we want to check here, is that *if* the macro was overridden to a
compile-time constant, then must be defined to zero, otherwise it's a
bug.

So the correct check is:
BUG_ON(__builtin_constant_p(cpu_has_counter) && cpu_has_counter);

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
---
 arch/mips/kernel/cpu-probe.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index a07e66a6e063..6be23f205e74 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -2123,7 +2123,7 @@ static inline void cpu_probe_ingenic(struct cpuinfo_mips *c, unsigned int cpu)
 
 	/* XBurst does not implement the CP0 counter. */
 	c->options &= ~MIPS_CPU_COUNTER;
-	BUG_ON(!__builtin_constant_p(cpu_has_counter) || cpu_has_counter);
+	BUG_ON(__builtin_constant_p(cpu_has_counter) && cpu_has_counter);
 
 	/* XBurst has virtually tagged icache */
 	c->icache.flags |= MIPS_CACHE_VTAG;
-- 
2.27.0


^ permalink raw reply related	[flat|nested] 27+ messages in thread

* [PATCH 04/13] MIPS: Kconfig: add MIPS_GENERIC_KERNEL symbol
  2020-08-03 17:01 [PATCH 00/13] MIPS: Convert Ingenic to a generic board Paul Cercueil
                   ` (2 preceding siblings ...)
  2020-08-03 17:01 ` [PATCH 03/13] MIPS: cpu-probe: ingenic: Fix broken BUG_ON Paul Cercueil
@ 2020-08-03 17:01 ` Paul Cercueil
  2020-08-03 17:01 ` [PATCH 05/13] MIPS: machine: Add get_system_type callback Paul Cercueil
                   ` (9 subsequent siblings)
  13 siblings, 0 replies; 27+ messages in thread
From: Paul Cercueil @ 2020-08-03 17:01 UTC (permalink / raw)
  To: Thomas Bogendoerfer
  Cc: Paul Burton, Krzysztof Kozlowski, 周琰杰,
	od, linux-kernel, linux-mips, Paul Cercueil

The MIPS_GENERIC symbol now won't select any other configuration option.
The MIPS_GENERIC_KERNEL will select all the options that the previous
MIPS_GENERIC option did select, and will select MIPS_GENERIC as well.

The whole point of this, is that it now becomes possible to compile a
kernel for a SoC supported by the arch/mips/generic/ code, without
making that kernel generic itself.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
---
 arch/mips/Kconfig         | 8 ++++++--
 arch/mips/generic/Kconfig | 2 +-
 2 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index f6bb446d30f0..17878c37fc84 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -94,14 +94,18 @@ config MIPS
 config MIPS_FIXUP_BIGPHYS_ADDR
 	bool
 
+config MIPS_GENERIC
+	bool
+
 menu "Machine selection"
 
 choice
 	prompt "System type"
-	default MIPS_GENERIC
+	default MIPS_GENERIC_KERNEL
 
-config MIPS_GENERIC
+config MIPS_GENERIC_KERNEL
 	bool "Generic board-agnostic MIPS kernel"
+	select MIPS_GENERIC
 	select BOOT_RAW
 	select BUILTIN_DTB
 	select CEVT_R4K
diff --git a/arch/mips/generic/Kconfig b/arch/mips/generic/Kconfig
index fd6019802657..5216c850b7e2 100644
--- a/arch/mips/generic/Kconfig
+++ b/arch/mips/generic/Kconfig
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: GPL-2.0
-if MIPS_GENERIC
+if MIPS_GENERIC_KERNEL
 
 config LEGACY_BOARDS
 	bool
-- 
2.27.0


^ permalink raw reply related	[flat|nested] 27+ messages in thread

* [PATCH 05/13] MIPS: machine: Add get_system_type callback
  2020-08-03 17:01 [PATCH 00/13] MIPS: Convert Ingenic to a generic board Paul Cercueil
                   ` (3 preceding siblings ...)
  2020-08-03 17:01 ` [PATCH 04/13] MIPS: Kconfig: add MIPS_GENERIC_KERNEL symbol Paul Cercueil
@ 2020-08-03 17:01 ` Paul Cercueil
  2020-08-03 17:01 ` [PATCH 06/13] MIPS: generic: Call the machine's .get_system_type callback if provided Paul Cercueil
                   ` (8 subsequent siblings)
  13 siblings, 0 replies; 27+ messages in thread
From: Paul Cercueil @ 2020-08-03 17:01 UTC (permalink / raw)
  To: Thomas Bogendoerfer
  Cc: Paul Burton, Krzysztof Kozlowski, 周琰杰,
	od, linux-kernel, linux-mips, Paul Cercueil

The global get_system_type() function in arch/mips/generic/ will then be
modified in a subsequent patch to call this callback if provided.

This change will allow mips_machine implementations to override the
behaviour of the global get_system_type() function.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
---
 arch/mips/include/asm/machine.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/mips/include/asm/machine.h b/arch/mips/include/asm/machine.h
index 29ca344a8cab..433257e08d83 100644
--- a/arch/mips/include/asm/machine.h
+++ b/arch/mips/include/asm/machine.h
@@ -16,6 +16,7 @@ struct mips_machine {
 	bool (*detect)(void);
 	const void *(*fixup_fdt)(const void *fdt, const void *match_data);
 	unsigned int (*measure_hpt_freq)(void);
+	const char *(*get_system_type)(struct device_node *dtb);
 };
 
 extern long __mips_machines_start;
-- 
2.27.0


^ permalink raw reply related	[flat|nested] 27+ messages in thread

* [PATCH 06/13] MIPS: generic: Call the machine's .get_system_type callback if provided
  2020-08-03 17:01 [PATCH 00/13] MIPS: Convert Ingenic to a generic board Paul Cercueil
                   ` (4 preceding siblings ...)
  2020-08-03 17:01 ` [PATCH 05/13] MIPS: machine: Add get_system_type callback Paul Cercueil
@ 2020-08-03 17:01 ` Paul Cercueil
  2020-08-11 12:43   ` Paul Cercueil
  2020-08-03 17:01 ` [PATCH 07/13] MIPS: generic: Support booting with built-in or appended DTB Paul Cercueil
                   ` (7 subsequent siblings)
  13 siblings, 1 reply; 27+ messages in thread
From: Paul Cercueil @ 2020-08-03 17:01 UTC (permalink / raw)
  To: Thomas Bogendoerfer
  Cc: Paul Burton, Krzysztof Kozlowski, 周琰杰,
	od, linux-kernel, linux-mips, Paul Cercueil

Call the machine's .get_system_type callback in the global
get_system_type() function, if it was provided by the mips_machine
implementation.

The get_system_type() function had to be moved within init.c to be able
to use the static variable "mach". Therefore the proc.c, now empty, has
been removed.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
---
 arch/mips/generic/Makefile |  1 -
 arch/mips/generic/init.c   | 19 +++++++++++++++++++
 arch/mips/generic/proc.c   | 25 -------------------------
 3 files changed, 19 insertions(+), 26 deletions(-)
 delete mode 100644 arch/mips/generic/proc.c

diff --git a/arch/mips/generic/Makefile b/arch/mips/generic/Makefile
index 2384a6b09e4c..f49aeede93c2 100644
--- a/arch/mips/generic/Makefile
+++ b/arch/mips/generic/Makefile
@@ -6,7 +6,6 @@
 
 obj-y += init.o
 obj-y += irq.o
-obj-y += proc.o
 
 obj-$(CONFIG_YAMON_DT_SHIM)		+= yamon-dt.o
 obj-$(CONFIG_LEGACY_BOARD_SEAD3)	+= board-sead3.o
diff --git a/arch/mips/generic/init.c b/arch/mips/generic/init.c
index 805d0135a9f4..7d82b436939e 100644
--- a/arch/mips/generic/init.c
+++ b/arch/mips/generic/init.c
@@ -207,3 +207,22 @@ void __init arch_init_irq(void)
 void __init prom_free_prom_memory(void)
 {
 }
+
+const char *get_system_type(void)
+{
+	const char *str;
+	int err;
+
+	if (mach && mach->get_system_type)
+		return mach->get_system_type(of_root);
+
+	err = of_property_read_string(of_root, "model", &str);
+	if (!err)
+		return str;
+
+	err = of_property_read_string_index(of_root, "compatible", 0, &str);
+	if (!err)
+		return str;
+
+	return "Unknown";
+}
diff --git a/arch/mips/generic/proc.c b/arch/mips/generic/proc.c
deleted file mode 100644
index 4c992809cc3f..000000000000
--- a/arch/mips/generic/proc.c
+++ /dev/null
@@ -1,25 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * Copyright (C) 2016 Imagination Technologies
- * Author: Paul Burton <paul.burton@mips.com>
- */
-
-#include <linux/of.h>
-
-#include <asm/bootinfo.h>
-
-const char *get_system_type(void)
-{
-	const char *str;
-	int err;
-
-	err = of_property_read_string(of_root, "model", &str);
-	if (!err)
-		return str;
-
-	err = of_property_read_string_index(of_root, "compatible", 0, &str);
-	if (!err)
-		return str;
-
-	return "Unknown";
-}
-- 
2.27.0


^ permalink raw reply related	[flat|nested] 27+ messages in thread

* [PATCH 07/13] MIPS: generic: Support booting with built-in or appended DTB
  2020-08-03 17:01 [PATCH 00/13] MIPS: Convert Ingenic to a generic board Paul Cercueil
                   ` (5 preceding siblings ...)
  2020-08-03 17:01 ` [PATCH 06/13] MIPS: generic: Call the machine's .get_system_type callback if provided Paul Cercueil
@ 2020-08-03 17:01 ` Paul Cercueil
  2020-08-03 17:01 ` [PATCH 08/13] MIPS: generic: Add support for zboot Paul Cercueil
                   ` (6 subsequent siblings)
  13 siblings, 0 replies; 27+ messages in thread
From: Paul Cercueil @ 2020-08-03 17:01 UTC (permalink / raw)
  To: Thomas Bogendoerfer
  Cc: Paul Burton, Krzysztof Kozlowski, 周琰杰,
	od, linux-kernel, linux-mips, Paul Cercueil

The plat_get_fdt() checked that the kernel was booted using UHI before
reading the 'fw_passed_dtb' variable. However, this variable is also set
when the kernel has been appended, or when it has been built into the
kernel.

Support these usecases by removing the UHI check.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
---
 arch/mips/generic/init.c | 9 ++++-----
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/arch/mips/generic/init.c b/arch/mips/generic/init.c
index 7d82b436939e..2465537672fa 100644
--- a/arch/mips/generic/init.c
+++ b/arch/mips/generic/init.c
@@ -39,12 +39,11 @@ void __init *plat_get_fdt(void)
 		/* Already set up */
 		return (void *)fdt;
 
-	if ((fw_arg0 == -2) && !fdt_check_header((void *)fw_passed_dtb)) {
+	if (fw_passed_dtb && !fdt_check_header((void *)fw_passed_dtb)) {
 		/*
-		 * We booted using the UHI boot protocol, so we have been
-		 * provided with the appropriate device tree for the board.
-		 * Make use of it & search for any machine struct based upon
-		 * the root compatible string.
+		 * We have been provided with the appropriate device tree for
+		 * the board. Make use of it & search for any machine struct
+		 * based upon the root compatible string.
 		 */
 		fdt = (void *)fw_passed_dtb;
 
-- 
2.27.0


^ permalink raw reply related	[flat|nested] 27+ messages in thread

* [PATCH 08/13] MIPS: generic: Add support for zboot
  2020-08-03 17:01 [PATCH 00/13] MIPS: Convert Ingenic to a generic board Paul Cercueil
                   ` (6 preceding siblings ...)
  2020-08-03 17:01 ` [PATCH 07/13] MIPS: generic: Support booting with built-in or appended DTB Paul Cercueil
@ 2020-08-03 17:01 ` Paul Cercueil
  2020-08-03 17:01 ` [PATCH 09/13] MIPS: generic: Increase NR_IRQS to 256 Paul Cercueil
                   ` (5 subsequent siblings)
  13 siblings, 0 replies; 27+ messages in thread
From: Paul Cercueil @ 2020-08-03 17:01 UTC (permalink / raw)
  To: Thomas Bogendoerfer
  Cc: Paul Burton, Krzysztof Kozlowski, 周琰杰,
	od, linux-kernel, linux-mips, Paul Cercueil

There is no reason we can't create compressed kernels here, so select
the option SYS_SUPPORTS_ZBOOT.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
---
 arch/mips/Kconfig          | 1 +
 arch/mips/generic/Platform | 1 +
 2 files changed, 2 insertions(+)

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 17878c37fc84..0206d86dab7f 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -142,6 +142,7 @@ config MIPS_GENERIC_KERNEL
 	select SYS_SUPPORTS_MULTITHREADING
 	select SYS_SUPPORTS_RELOCATABLE
 	select SYS_SUPPORTS_SMARTMIPS
+	select SYS_SUPPORTS_ZBOOT
 	select UHI_BOOT
 	select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
 	select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
diff --git a/arch/mips/generic/Platform b/arch/mips/generic/Platform
index 53c33cb72974..4cefecf7d14b 100644
--- a/arch/mips/generic/Platform
+++ b/arch/mips/generic/Platform
@@ -10,6 +10,7 @@
 
 cflags-$(CONFIG_MIPS_GENERIC)	+= -I$(srctree)/arch/mips/include/asm/mach-generic
 load-$(CONFIG_MIPS_GENERIC)	+= 0xffffffff80100000
+zload-$(CONFIG_MIPS_GENERIC)	+= 0xffffffff81000000
 all-$(CONFIG_MIPS_GENERIC)	:= vmlinux.gz.itb
 
 its-y					:= vmlinux.its.S
-- 
2.27.0


^ permalink raw reply related	[flat|nested] 27+ messages in thread

* [PATCH 09/13] MIPS: generic: Increase NR_IRQS to 256
  2020-08-03 17:01 [PATCH 00/13] MIPS: Convert Ingenic to a generic board Paul Cercueil
                   ` (7 preceding siblings ...)
  2020-08-03 17:01 ` [PATCH 08/13] MIPS: generic: Add support for zboot Paul Cercueil
@ 2020-08-03 17:01 ` Paul Cercueil
  2020-08-03 17:01 ` [PATCH 10/13] MIPS: generic: Add support for Ingenic SoCs Paul Cercueil
                   ` (4 subsequent siblings)
  13 siblings, 0 replies; 27+ messages in thread
From: Paul Cercueil @ 2020-08-03 17:01 UTC (permalink / raw)
  To: Thomas Bogendoerfer
  Cc: Paul Burton, Krzysztof Kozlowski, 周琰杰,
	od, linux-kernel, linux-mips, Paul Cercueil

128 IRQs is not enough to support Ingenic SoCs.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
---
 arch/mips/include/asm/mach-generic/irq.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/mips/include/asm/mach-generic/irq.h b/arch/mips/include/asm/mach-generic/irq.h
index 72ac2c202c55..079889ced4f3 100644
--- a/arch/mips/include/asm/mach-generic/irq.h
+++ b/arch/mips/include/asm/mach-generic/irq.h
@@ -9,7 +9,7 @@
 #define __ASM_MACH_GENERIC_IRQ_H
 
 #ifndef NR_IRQS
-#define NR_IRQS 128
+#define NR_IRQS 256
 #endif
 
 #ifdef CONFIG_I8259
-- 
2.27.0


^ permalink raw reply related	[flat|nested] 27+ messages in thread

* [PATCH 10/13] MIPS: generic: Add support for Ingenic SoCs
  2020-08-03 17:01 [PATCH 00/13] MIPS: Convert Ingenic to a generic board Paul Cercueil
                   ` (8 preceding siblings ...)
  2020-08-03 17:01 ` [PATCH 09/13] MIPS: generic: Increase NR_IRQS to 256 Paul Cercueil
@ 2020-08-03 17:01 ` Paul Cercueil
  2020-08-03 17:01 ` [PATCH 11/13] MIPS: jz4740: Drop folder Paul Cercueil
                   ` (3 subsequent siblings)
  13 siblings, 0 replies; 27+ messages in thread
From: Paul Cercueil @ 2020-08-03 17:01 UTC (permalink / raw)
  To: Thomas Bogendoerfer
  Cc: Paul Burton, Krzysztof Kozlowski, 周琰杰,
	od, linux-kernel, linux-mips, Paul Cercueil

Add support for Ingenic SoCs in arch/mips/generic/.

The Kconfig changes are here to ensure that it is possible to compile
either a generic kernel that supports Ingenic SoCs, or a Ingenic-only
kernel, both using the same code base, to avoid duplicated code.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
---
 arch/mips/Kbuild.platforms        |   1 -
 arch/mips/Kconfig                 |  32 +++++----
 arch/mips/generic/Kconfig         |   6 ++
 arch/mips/generic/Makefile        |   1 +
 arch/mips/generic/board-ingenic.c | 108 ++++++++++++++++++++++++++++++
 arch/mips/jz4740/Kconfig          |  16 +++--
 6 files changed, 146 insertions(+), 18 deletions(-)
 create mode 100644 arch/mips/generic/board-ingenic.c

diff --git a/arch/mips/Kbuild.platforms b/arch/mips/Kbuild.platforms
index a13c4cf6e608..949222c09927 100644
--- a/arch/mips/Kbuild.platforms
+++ b/arch/mips/Kbuild.platforms
@@ -13,7 +13,6 @@ platform-$(CONFIG_MIPS_COBALT)		+= cobalt/
 platform-$(CONFIG_MACH_DECSTATION)	+= dec/
 platform-$(CONFIG_MIPS_GENERIC)		+= generic/
 platform-$(CONFIG_MACH_JAZZ)		+= jazz/
-platform-$(CONFIG_MACH_INGENIC)		+= jz4740/
 platform-$(CONFIG_LANTIQ)		+= lantiq/
 platform-$(CONFIG_MACH_LOONGSON2EF)	+= loongson2ef/
 platform-$(CONFIG_MACH_LOONGSON32)	+= loongson32/
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 0206d86dab7f..0c70cb159e8f 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -97,6 +97,23 @@ config MIPS_FIXUP_BIGPHYS_ADDR
 config MIPS_GENERIC
 	bool
 
+config MACH_INGENIC
+	bool
+	select SYS_SUPPORTS_32BIT_KERNEL
+	select SYS_SUPPORTS_LITTLE_ENDIAN
+	select SYS_SUPPORTS_ZBOOT
+	select CPU_SUPPORTS_HUGEPAGES
+	select DMA_NONCOHERENT
+	select IRQ_MIPS_CPU
+	select PINCTRL
+	select GPIOLIB
+	select COMMON_CLK
+	select GENERIC_IRQ_CHIP
+	select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
+	select USE_OF
+	select CPU_SUPPORTS_CPUFREQ
+	select MIPS_EXTERNAL_TIMER
+
 menu "Machine selection"
 
 choice
@@ -394,20 +411,11 @@ config MACH_JAZZ
 	  Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
 	  Olivetti M700-10 workstations.
 
-config MACH_INGENIC
+config MACH_INGENIC_SOC
 	bool "Ingenic SoC based machines"
-	select SYS_SUPPORTS_32BIT_KERNEL
-	select SYS_SUPPORTS_LITTLE_ENDIAN
+	select MIPS_GENERIC
+	select MACH_INGENIC
 	select SYS_SUPPORTS_ZBOOT_UART16550
-	select CPU_SUPPORTS_HUGEPAGES
-	select DMA_NONCOHERENT
-	select IRQ_MIPS_CPU
-	select PINCTRL
-	select GPIOLIB
-	select COMMON_CLK
-	select GENERIC_IRQ_CHIP
-	select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
-	select USE_OF
 
 config LANTIQ
 	bool "Lantiq based platforms"
diff --git a/arch/mips/generic/Kconfig b/arch/mips/generic/Kconfig
index 5216c850b7e2..55d9aed7ced9 100644
--- a/arch/mips/generic/Kconfig
+++ b/arch/mips/generic/Kconfig
@@ -73,6 +73,12 @@ config FIT_IMAGE_FDT_OCELOT
 	  from Microsemi in the FIT kernel image.
 	  This requires u-boot on the platform.
 
+config BOARD_INGENIC
+	bool "Support boards based on Ingenic SoCs"
+	select MACH_INGENIC_GENERIC
+	help
+	  Enable support for boards based on Ingenic SoCs.
+
 config VIRT_BOARD_RANCHU
 	bool "Support Ranchu platform for Android emulator"
 	help
diff --git a/arch/mips/generic/Makefile b/arch/mips/generic/Makefile
index f49aeede93c2..0e6feb3f43ae 100644
--- a/arch/mips/generic/Makefile
+++ b/arch/mips/generic/Makefile
@@ -10,4 +10,5 @@ obj-y += irq.o
 obj-$(CONFIG_YAMON_DT_SHIM)		+= yamon-dt.o
 obj-$(CONFIG_LEGACY_BOARD_SEAD3)	+= board-sead3.o
 obj-$(CONFIG_LEGACY_BOARD_OCELOT)	+= board-ocelot.o
+obj-$(CONFIG_MACH_INGENIC)			+= board-ingenic.o
 obj-$(CONFIG_VIRT_BOARD_RANCHU)		+= board-ranchu.o
diff --git a/arch/mips/generic/board-ingenic.c b/arch/mips/generic/board-ingenic.c
new file mode 100644
index 000000000000..bb50eb2eed5b
--- /dev/null
+++ b/arch/mips/generic/board-ingenic.c
@@ -0,0 +1,108 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Support for Ingenic SoCs
+ *
+ * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
+ * Copyright (C) 2011, Maarten ter Huurne <maarten@treewalker.org>
+ * Copyright (C) 2020 Paul Cercueil <paul@crapouillou.net>
+ */
+
+#include <linux/of_address.h>
+#include <linux/of_fdt.h>
+#include <linux/pm.h>
+#include <linux/sizes.h>
+#include <linux/suspend.h>
+#include <linux/types.h>
+
+#include <asm/bootinfo.h>
+#include <asm/machine.h>
+#include <asm/reboot.h>
+
+static __init const void *ingenic_fixup_fdt(const void *fdt, const void *match_data)
+{
+	/*
+	 * Old devicetree files for the qi,lb60 board did not have a /memory
+	 * node. Hardcode the memory info here.
+	 */
+	if (!fdt_node_check_compatible(fdt, 0, "qi,lb60") &&
+	    fdt_path_offset(fdt, "/memory") < 0)
+		early_init_dt_add_memory_arch(0, SZ_32M);
+
+	mips_machtype = (enum ingenic_machine_type)match_data;
+
+	return fdt;
+}
+
+static const char *ingenic_get_system_type(struct device_node *dtb)
+{
+	switch (mips_machtype) {
+	case MACH_INGENIC_X1830:
+		return "X1830";
+	case MACH_INGENIC_X1000:
+		return "X1000";
+	case MACH_INGENIC_JZ4780:
+		return "JZ4780";
+	case MACH_INGENIC_JZ4770:
+		return "JZ4770";
+	case MACH_INGENIC_JZ4725B:
+		return "JZ4725B";
+	default:
+		return "JZ4740";
+	}
+}
+
+static const struct of_device_id ingenic_of_match[] __initconst = {
+	{ .compatible = "ingenic,jz4740", .data = (void *)MACH_INGENIC_JZ4740 },
+	{ .compatible = "ingenic,jz4725b", .data = (void *)MACH_INGENIC_JZ4725B },
+	{ .compatible = "ingenic,jz4770", .data = (void *)MACH_INGENIC_JZ4770 },
+	{ .compatible = "ingenic,jz4780", .data = (void *)MACH_INGENIC_JZ4780 },
+	{ .compatible = "ingenic,x1000", .data = (void *)MACH_INGENIC_X1000 },
+	{ .compatible = "ingenic,x1830", .data = (void *)MACH_INGENIC_X1830 },
+	{}
+};
+
+MIPS_MACHINE(ingenic) = {
+	.matches = ingenic_of_match,
+	.fixup_fdt = ingenic_fixup_fdt,
+	.get_system_type = ingenic_get_system_type,
+};
+
+static void ingenic_wait_instr(void)
+{
+	__asm__(".set push;\n"
+		".set mips3;\n"
+		"wait;\n"
+		".set pop;\n"
+	);
+}
+
+static void ingenic_halt(void)
+{
+	for (;;)
+		ingenic_wait_instr();
+}
+
+static int __maybe_unused ingenic_pm_enter(suspend_state_t state)
+{
+	ingenic_wait_instr();
+
+	return 0;
+}
+
+static const struct platform_suspend_ops ingenic_pm_ops __maybe_unused = {
+	.valid = suspend_valid_only_mem,
+	.enter = ingenic_pm_enter,
+};
+
+static int __init ingenic_pm_init(void)
+{
+	if (boot_cpu_type() == CPU_XBURST) {
+		if (IS_ENABLED(CONFIG_PM_SLEEP))
+			suspend_set_ops(&ingenic_pm_ops);
+		_machine_halt = ingenic_halt;
+	}
+
+	return 0;
+
+}
+late_initcall(ingenic_pm_init);
diff --git a/arch/mips/jz4740/Kconfig b/arch/mips/jz4740/Kconfig
index c2a6fbf8e411..3238e16febd5 100644
--- a/arch/mips/jz4740/Kconfig
+++ b/arch/mips/jz4740/Kconfig
@@ -1,15 +1,21 @@
 # SPDX-License-Identifier: GPL-2.0
+
+config MACH_INGENIC_GENERIC
+	bool
+	select MACH_INGENIC
+	select MACH_JZ4740
+	select MACH_JZ4770
+	select MACH_JZ4780
+	select MACH_X1000
+
 choice
 	prompt "Machine type"
-	depends on MACH_INGENIC
+	depends on MACH_INGENIC_SOC
 	default INGENIC_GENERIC_BOARD
 
 config INGENIC_GENERIC_BOARD
 	bool "Generic board"
-	select MACH_JZ4740
-	select MACH_JZ4770
-	select MACH_JZ4780
-	select MACH_X1000
+	select MACH_INGENIC_GENERIC
 
 config JZ4740_QI_LB60
 	bool "Qi Hardware Ben NanoNote"
-- 
2.27.0


^ permalink raw reply related	[flat|nested] 27+ messages in thread

* [PATCH 11/13] MIPS: jz4740: Drop folder
  2020-08-03 17:01 [PATCH 00/13] MIPS: Convert Ingenic to a generic board Paul Cercueil
                   ` (9 preceding siblings ...)
  2020-08-03 17:01 ` [PATCH 10/13] MIPS: generic: Add support for Ingenic SoCs Paul Cercueil
@ 2020-08-03 17:01 ` Paul Cercueil
  2020-08-03 17:01 ` [PATCH 12/13] MIPS: configs: Regenerate configs of Ingenic boards Paul Cercueil
                   ` (2 subsequent siblings)
  13 siblings, 0 replies; 27+ messages in thread
From: Paul Cercueil @ 2020-08-03 17:01 UTC (permalink / raw)
  To: Thomas Bogendoerfer
  Cc: Paul Burton, Krzysztof Kozlowski, 周琰杰,
	od, linux-kernel, linux-mips, Paul Cercueil

Support for Ingenic SoCs is now provided by the arch/mips/generic/ code,
so the arch/mips/jz4740/ folder can be completely dropped. The exception
is the Kconfig, which has been moved to arch/mips/ingenic/Kconfig in the
process.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
---
 arch/mips/Kconfig                             |   2 +-
 .../asm/mach-jz4740/cpu-feature-overrides.h   |  50 ------
 arch/mips/include/asm/mach-jz4740/irq.h       |  13 --
 arch/mips/{jz4740 => ingenic}/Kconfig         |   0
 arch/mips/jz4740/Makefile                     |   9 --
 arch/mips/jz4740/Platform                     |   3 -
 arch/mips/jz4740/setup.c                      | 145 ------------------
 7 files changed, 1 insertion(+), 221 deletions(-)
 delete mode 100644 arch/mips/include/asm/mach-jz4740/cpu-feature-overrides.h
 delete mode 100644 arch/mips/include/asm/mach-jz4740/irq.h
 rename arch/mips/{jz4740 => ingenic}/Kconfig (100%)
 delete mode 100644 arch/mips/jz4740/Makefile
 delete mode 100644 arch/mips/jz4740/Platform
 delete mode 100644 arch/mips/jz4740/setup.c

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 0c70cb159e8f..48bcdbdbbbb1 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -1035,8 +1035,8 @@ source "arch/mips/bcm47xx/Kconfig"
 source "arch/mips/bcm63xx/Kconfig"
 source "arch/mips/bmips/Kconfig"
 source "arch/mips/generic/Kconfig"
+source "arch/mips/ingenic/Kconfig"
 source "arch/mips/jazz/Kconfig"
-source "arch/mips/jz4740/Kconfig"
 source "arch/mips/lantiq/Kconfig"
 source "arch/mips/pic32/Kconfig"
 source "arch/mips/pistachio/Kconfig"
diff --git a/arch/mips/include/asm/mach-jz4740/cpu-feature-overrides.h b/arch/mips/include/asm/mach-jz4740/cpu-feature-overrides.h
deleted file mode 100644
index 7c5e576f9d96..000000000000
--- a/arch/mips/include/asm/mach-jz4740/cpu-feature-overrides.h
+++ /dev/null
@@ -1,50 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- */
-#ifndef __ASM_MACH_JZ4740_CPU_FEATURE_OVERRIDES_H
-#define __ASM_MACH_JZ4740_CPU_FEATURE_OVERRIDES_H
-
-#define cpu_has_tlb 1
-#define cpu_has_4kex		1
-#define cpu_has_3k_cache	0
-#define cpu_has_4k_cache	1
-#define cpu_has_tx39_cache	0
-#define cpu_has_counter		0
-#define cpu_has_watch		1
-#define cpu_has_divec		1
-#define cpu_has_vce		0
-#define cpu_has_cache_cdex_p	0
-#define cpu_has_cache_cdex_s	0
-#define cpu_has_prefetch	1
-#define cpu_has_mcheck 1
-#define cpu_has_ejtag 1
-#define cpu_has_llsc		1
-#define cpu_has_mips16 0
-#define cpu_has_mips16e2	0
-#define cpu_has_mdmx 0
-#define cpu_has_mips3d 0
-#define cpu_has_smartmips 0
-#define kernel_uses_llsc	1
-#define cpu_has_vtag_icache	1
-#define cpu_has_dc_aliases	0
-#define cpu_has_ic_fills_f_dc	0
-#define cpu_has_pindexed_dcache 0
-#define cpu_has_mips32r1	1
-#define cpu_has_mips64r1	0
-#define cpu_has_mips64r2	0
-#define cpu_has_dsp		0
-#define cpu_has_dsp2		0
-#define cpu_has_mipsmt		0
-#define cpu_has_userlocal	0
-#define cpu_has_nofpuex 0
-#define cpu_has_64bits		0
-#define cpu_has_64bit_zero_reg 0
-#define cpu_has_inclusive_pcaches 0
-
-#define cpu_dcache_line_size()	32
-#define cpu_icache_line_size()	32
-
-#endif
diff --git a/arch/mips/include/asm/mach-jz4740/irq.h b/arch/mips/include/asm/mach-jz4740/irq.h
deleted file mode 100644
index 27c543bd340f..000000000000
--- a/arch/mips/include/asm/mach-jz4740/irq.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-/*
- *  Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
- *  JZ4740 IRQ definitions
- */
-
-#ifndef __ASM_MACH_JZ4740_IRQ_H__
-#define __ASM_MACH_JZ4740_IRQ_H__
-
-#define MIPS_CPU_IRQ_BASE 0
-#define NR_IRQS 256
-
-#endif
diff --git a/arch/mips/jz4740/Kconfig b/arch/mips/ingenic/Kconfig
similarity index 100%
rename from arch/mips/jz4740/Kconfig
rename to arch/mips/ingenic/Kconfig
diff --git a/arch/mips/jz4740/Makefile b/arch/mips/jz4740/Makefile
deleted file mode 100644
index f96c0f5eca44..000000000000
--- a/arch/mips/jz4740/Makefile
+++ /dev/null
@@ -1,9 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0
-#
-# Makefile for the Ingenic JZ4740.
-#
-
-# Object file lists.
-obj-y += setup.o
-
-CFLAGS_setup.o = -I$(src)/../../../scripts/dtc/libfdt
diff --git a/arch/mips/jz4740/Platform b/arch/mips/jz4740/Platform
deleted file mode 100644
index bd35d0621b13..000000000000
--- a/arch/mips/jz4740/Platform
+++ /dev/null
@@ -1,3 +0,0 @@
-cflags-$(CONFIG_MACH_INGENIC)	+= -I$(srctree)/arch/mips/include/asm/mach-jz4740
-load-$(CONFIG_MACH_INGENIC)	+= 0xffffffff80010000
-zload-$(CONFIG_MACH_INGENIC)	+= 0xffffffff81000000
diff --git a/arch/mips/jz4740/setup.c b/arch/mips/jz4740/setup.c
deleted file mode 100644
index 51d906325ce6..000000000000
--- a/arch/mips/jz4740/setup.c
+++ /dev/null
@@ -1,145 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- *  Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
- *  Copyright (C) 2011, Maarten ter Huurne <maarten@treewalker.org>
- *  JZ4740 setup code
- */
-
-#include <linux/clocksource.h>
-#include <linux/init.h>
-#include <linux/io.h>
-#include <linux/irqchip.h>
-#include <linux/kernel.h>
-#include <linux/libfdt.h>
-#include <linux/of_clk.h>
-#include <linux/of_fdt.h>
-#include <linux/pm.h>
-#include <linux/sizes.h>
-#include <linux/suspend.h>
-
-#include <asm/bootinfo.h>
-#include <asm/fw/fw.h>
-#include <asm/prom.h>
-#include <asm/reboot.h>
-#include <asm/time.h>
-
-static unsigned long __init get_board_mach_type(const void *fdt)
-{
-	if (!fdt_node_check_compatible(fdt, 0, "ingenic,x2000"))
-		return MACH_INGENIC_X2000;
-	if (!fdt_node_check_compatible(fdt, 0, "ingenic,x1830"))
-		return MACH_INGENIC_X1830;
-	if (!fdt_node_check_compatible(fdt, 0, "ingenic,x1000"))
-		return MACH_INGENIC_X1000;
-	if (!fdt_node_check_compatible(fdt, 0, "ingenic,jz4780"))
-		return MACH_INGENIC_JZ4780;
-	if (!fdt_node_check_compatible(fdt, 0, "ingenic,jz4770"))
-		return MACH_INGENIC_JZ4770;
-	if (!fdt_node_check_compatible(fdt, 0, "ingenic,jz4725b"))
-		return MACH_INGENIC_JZ4725B;
-
-	return MACH_INGENIC_JZ4740;
-}
-
-void __init plat_mem_setup(void)
-{
-	void *dtb = (void *)fw_passed_dtb;
-
-	__dt_setup_arch(dtb);
-
-	/*
-	 * Old devicetree files for the qi,lb60 board did not have a /memory
-	 * node. Hardcode the memory info here.
-	 */
-	if (!fdt_node_check_compatible(dtb, 0, "qi,lb60") &&
-	    fdt_path_offset(dtb, "/memory") < 0)
-		early_init_dt_add_memory_arch(0, SZ_32M);
-
-	mips_machtype = get_board_mach_type(dtb);
-}
-
-void __init device_tree_init(void)
-{
-	if (!initial_boot_params)
-		return;
-
-	unflatten_and_copy_device_tree();
-}
-
-const char *get_system_type(void)
-{
-	switch (mips_machtype) {
-	case MACH_INGENIC_X2000:
-		return "X2000";
-	case MACH_INGENIC_X1830:
-		return "X1830";
-	case MACH_INGENIC_X1000:
-		return "X1000";
-	case MACH_INGENIC_JZ4780:
-		return "JZ4780";
-	case MACH_INGENIC_JZ4770:
-		return "JZ4770";
-	case MACH_INGENIC_JZ4725B:
-		return "JZ4725B";
-	default:
-		return "JZ4740";
-	}
-}
-
-void __init arch_init_irq(void)
-{
-	irqchip_init();
-}
-
-void __init plat_time_init(void)
-{
-	of_clk_init(NULL);
-	timer_probe();
-}
-
-void __init prom_init(void)
-{
-	fw_init_cmdline();
-}
-
-void __init prom_free_prom_memory(void)
-{
-}
-
-static void jz4740_wait_instr(void)
-{
-	__asm__(".set push;\n"
-		".set mips3;\n"
-		"wait;\n"
-		".set pop;\n"
-	);
-}
-
-static void jz4740_halt(void)
-{
-	for (;;)
-		jz4740_wait_instr();
-}
-
-static int __maybe_unused jz4740_pm_enter(suspend_state_t state)
-{
-	jz4740_wait_instr();
-
-	return 0;
-}
-
-static const struct platform_suspend_ops jz4740_pm_ops __maybe_unused = {
-	.valid = suspend_valid_only_mem,
-	.enter = jz4740_pm_enter,
-};
-
-static int __init jz4740_pm_init(void)
-{
-	if (IS_ENABLED(CONFIG_PM_SLEEP))
-		suspend_set_ops(&jz4740_pm_ops);
-	_machine_halt = jz4740_halt;
-
-	return 0;
-
-}
-late_initcall(jz4740_pm_init);
-- 
2.27.0


^ permalink raw reply related	[flat|nested] 27+ messages in thread

* [PATCH 12/13] MIPS: configs: Regenerate configs of Ingenic boards
  2020-08-03 17:01 [PATCH 00/13] MIPS: Convert Ingenic to a generic board Paul Cercueil
                   ` (10 preceding siblings ...)
  2020-08-03 17:01 ` [PATCH 11/13] MIPS: jz4740: Drop folder Paul Cercueil
@ 2020-08-03 17:01 ` Paul Cercueil
  2020-08-03 17:01 ` [PATCH 13/13] MAINTAINERS: Update paths to Ingenic platform code Paul Cercueil
  2020-08-07 16:23 ` [PATCH 00/13] MIPS: Convert Ingenic to a generic board Zhou Yanjie
  13 siblings, 0 replies; 27+ messages in thread
From: Paul Cercueil @ 2020-08-03 17:01 UTC (permalink / raw)
  To: Thomas Bogendoerfer
  Cc: Paul Burton, Krzysztof Kozlowski, 周琰杰,
	od, linux-kernel, linux-mips, Paul Cercueil

For each board the MACH_INGENIC_SOC option was selected instead of
MACH_INGENIC. Nothing else was changed in the menuconfig.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
---
 arch/mips/configs/ci20_defconfig       |  4 ++--
 arch/mips/configs/cu1000-neo_defconfig | 16 ++--------------
 arch/mips/configs/gcw0_defconfig       |  2 +-
 arch/mips/configs/qi_lb60_defconfig    |  5 ++---
 arch/mips/configs/rs90_defconfig       |  4 ++--
 5 files changed, 9 insertions(+), 22 deletions(-)

diff --git a/arch/mips/configs/ci20_defconfig b/arch/mips/configs/ci20_defconfig
index 0a46199fdc3f..052c5ad0f2b1 100644
--- a/arch/mips/configs/ci20_defconfig
+++ b/arch/mips/configs/ci20_defconfig
@@ -22,7 +22,7 @@ CONFIG_EMBEDDED=y
 # CONFIG_VM_EVENT_COUNTERS is not set
 # CONFIG_COMPAT_BRK is not set
 CONFIG_SLAB=y
-CONFIG_MACH_INGENIC=y
+CONFIG_MACH_INGENIC_SOC=y
 CONFIG_JZ4780_CI20=y
 CONFIG_HIGHMEM=y
 CONFIG_HZ_100=y
@@ -42,7 +42,7 @@ CONFIG_IP_PNP_DHCP=y
 # CONFIG_IPV6 is not set
 # CONFIG_WIRELESS is not set
 CONFIG_DEVTMPFS=y
-# CONFIG_FW_LOADER is not set
+CONFIG_FW_LOADER=m
 # CONFIG_ALLOW_DEV_COREDUMP is not set
 CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
diff --git a/arch/mips/configs/cu1000-neo_defconfig b/arch/mips/configs/cu1000-neo_defconfig
index 6b471cdb16cf..55d0690a3ffe 100644
--- a/arch/mips/configs/cu1000-neo_defconfig
+++ b/arch/mips/configs/cu1000-neo_defconfig
@@ -1,5 +1,3 @@
-CONFIG_LOCALVERSION_AUTO=y
-CONFIG_KERNEL_GZIP=y
 CONFIG_SYSVIPC=y
 CONFIG_NO_HZ_IDLE=y
 CONFIG_HIGH_RES_TIMERS=y
@@ -9,7 +7,6 @@ CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_CGROUPS=y
 CONFIG_MEMCG=y
-CONFIG_MEMCG_KMEM=y
 CONFIG_CGROUP_SCHED=y
 CONFIG_CGROUP_FREEZER=y
 CONFIG_CGROUP_DEVICE=y
@@ -17,13 +14,12 @@ CONFIG_CGROUP_CPUACCT=y
 CONFIG_NAMESPACES=y
 CONFIG_USER_NS=y
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
-CONFIG_SYSCTL_SYSCALL=y
 CONFIG_KALLSYMS_ALL=y
 CONFIG_EMBEDDED=y
 # CONFIG_VM_EVENT_COUNTERS is not set
 # CONFIG_COMPAT_BRK is not set
 CONFIG_SLAB=y
-CONFIG_MACH_INGENIC=y
+CONFIG_MACH_INGENIC_SOC=y
 CONFIG_X1000_CU1000_NEO=y
 CONFIG_HIGHMEM=y
 CONFIG_HZ_100=y
@@ -32,7 +28,6 @@ CONFIG_HZ_100=y
 # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
 # CONFIG_COMPACTION is not set
 CONFIG_CMA=y
-CONFIG_CMA_AREAS=7
 CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_UNIX=y
@@ -41,19 +36,16 @@ CONFIG_CFG80211=y
 CONFIG_UEVENT_HELPER=y
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_DEVTMPFS=y
-# CONFIG_FW_LOADER is not set
 # CONFIG_ALLOW_DEV_COREDUMP is not set
 CONFIG_NETDEVICES=y
 CONFIG_STMMAC_ETH=y
 CONFIG_SMSC_PHY=y
 CONFIG_BRCMFMAC=y
-# CONFIG_INPUT_MOUSEDEV is not set
 # CONFIG_INPUT_KEYBOARD is not set
 # CONFIG_INPUT_MOUSE is not set
 # CONFIG_SERIO is not set
 CONFIG_VT_HW_CONSOLE_BINDING=y
 CONFIG_LEGACY_PTY_COUNT=2
-CONFIG_SERIAL_EARLYCON=y
 CONFIG_SERIAL_8250=y
 CONFIG_SERIAL_8250_CONSOLE=y
 CONFIG_SERIAL_8250_NR_UARTS=3
@@ -67,8 +59,6 @@ CONFIG_GPIO_SYSFS=y
 CONFIG_SENSORS_ADS7828=y
 CONFIG_WATCHDOG=y
 CONFIG_JZ4740_WDT=y
-# CONFIG_LCD_CLASS_DEVICE is not set
-# CONFIG_BACKLIGHT_CLASS_DEVICE is not set
 # CONFIG_VGA_CONSOLE is not set
 # CONFIG_HID is not set
 # CONFIG_USB_SUPPORT is not set
@@ -83,8 +73,6 @@ CONFIG_RTC_DRV_JZ4740=y
 CONFIG_DMADEVICES=y
 CONFIG_DMA_JZ4780=y
 # CONFIG_IOMMU_SUPPORT is not set
-CONFIG_NVMEM=y
-CONFIG_NVMEM_SYSFS=y
 CONFIG_EXT4_FS=y
 # CONFIG_DNOTIFY is not set
 CONFIG_AUTOFS_FS=y
@@ -109,8 +97,8 @@ CONFIG_CONSOLE_LOGLEVEL_QUIET=15
 CONFIG_MESSAGE_LOGLEVEL_DEFAULT=7
 CONFIG_DEBUG_INFO=y
 CONFIG_STRIP_ASM_SYMS=y
-CONFIG_DEBUG_FS=y
 CONFIG_MAGIC_SYSRQ=y
+CONFIG_DEBUG_FS=y
 CONFIG_PANIC_ON_OOPS=y
 CONFIG_PANIC_TIMEOUT=10
 # CONFIG_SCHED_DEBUG is not set
diff --git a/arch/mips/configs/gcw0_defconfig b/arch/mips/configs/gcw0_defconfig
index 48131cb47e66..e0ee6c37f410 100644
--- a/arch/mips/configs/gcw0_defconfig
+++ b/arch/mips/configs/gcw0_defconfig
@@ -4,7 +4,7 @@ CONFIG_HIGH_RES_TIMERS=y
 CONFIG_PREEMPT_VOLUNTARY=y
 CONFIG_EMBEDDED=y
 CONFIG_PROFILING=y
-CONFIG_MACH_INGENIC=y
+CONFIG_MACH_INGENIC_SOC=y
 CONFIG_JZ4770_GCW0=y
 CONFIG_HIGHMEM=y
 # CONFIG_SECCOMP is not set
diff --git a/arch/mips/configs/qi_lb60_defconfig b/arch/mips/configs/qi_lb60_defconfig
index 81bfbee72b0c..60428262ae9f 100644
--- a/arch/mips/configs/qi_lb60_defconfig
+++ b/arch/mips/configs/qi_lb60_defconfig
@@ -7,7 +7,7 @@ CONFIG_EMBEDDED=y
 # CONFIG_VM_EVENT_COUNTERS is not set
 # CONFIG_COMPAT_BRK is not set
 CONFIG_SLAB=y
-CONFIG_MACH_INGENIC=y
+CONFIG_MACH_INGENIC_SOC=y
 CONFIG_HZ_100=y
 # CONFIG_SECCOMP is not set
 CONFIG_MODULES=y
@@ -72,7 +72,6 @@ CONFIG_DRM=y
 CONFIG_DRM_FBDEV_OVERALLOC=200
 CONFIG_DRM_PANEL_SIMPLE=y
 CONFIG_DRM_INGENIC=y
-# CONFIG_LCD_CLASS_DEVICE is not set
 CONFIG_BACKLIGHT_CLASS_DEVICE=y
 # CONFIG_BACKLIGHT_GENERIC is not set
 # CONFIG_VGA_CONSOLE is not set
@@ -170,9 +169,9 @@ CONFIG_PRINTK_TIME=y
 CONFIG_DEBUG_INFO=y
 CONFIG_STRIP_ASM_SYMS=y
 CONFIG_READABLE_ASM=y
+CONFIG_KGDB=y
 CONFIG_DEBUG_KMEMLEAK=y
 CONFIG_DEBUG_MEMORY_INIT=y
 CONFIG_DEBUG_STACKOVERFLOW=y
 CONFIG_PANIC_ON_OOPS=y
 # CONFIG_FTRACE is not set
-CONFIG_KGDB=y
diff --git a/arch/mips/configs/rs90_defconfig b/arch/mips/configs/rs90_defconfig
index de6752051ecc..dfbb9fed9a42 100644
--- a/arch/mips/configs/rs90_defconfig
+++ b/arch/mips/configs/rs90_defconfig
@@ -19,7 +19,7 @@ CONFIG_EMBEDDED=y
 # CONFIG_PERF_EVENTS is not set
 CONFIG_SLAB=y
 CONFIG_PROFILING=y
-CONFIG_MACH_INGENIC=y
+CONFIG_MACH_INGENIC_SOC=y
 CONFIG_JZ4740_RS90=y
 CONFIG_PAGE_SIZE_16KB=y
 CONFIG_HZ_100=y
@@ -80,8 +80,8 @@ CONFIG_KEYBOARD_GPIO=y
 # CONFIG_INPUT_MOUSE is not set
 # CONFIG_SERIO is not set
 CONFIG_LEGACY_PTY_COUNT=2
-# CONFIG_DEVMEM is not set
 # CONFIG_HW_RANDOM is not set
+# CONFIG_DEVMEM is not set
 # CONFIG_I2C_COMPAT is not set
 # CONFIG_I2C_HELPER_AUTO is not set
 CONFIG_POWER_SUPPLY=y
-- 
2.27.0


^ permalink raw reply related	[flat|nested] 27+ messages in thread

* [PATCH 13/13] MAINTAINERS: Update paths to Ingenic platform code
  2020-08-03 17:01 [PATCH 00/13] MIPS: Convert Ingenic to a generic board Paul Cercueil
                   ` (11 preceding siblings ...)
  2020-08-03 17:01 ` [PATCH 12/13] MIPS: configs: Regenerate configs of Ingenic boards Paul Cercueil
@ 2020-08-03 17:01 ` Paul Cercueil
  2020-08-07 17:22   ` Zhou Yanjie
  2020-08-07 16:23 ` [PATCH 00/13] MIPS: Convert Ingenic to a generic board Zhou Yanjie
  13 siblings, 1 reply; 27+ messages in thread
From: Paul Cercueil @ 2020-08-03 17:01 UTC (permalink / raw)
  To: Thomas Bogendoerfer
  Cc: Paul Burton, Krzysztof Kozlowski, 周琰杰,
	od, linux-kernel, linux-mips, Paul Cercueil

Support for Ingenic chips has been moved to the generic MIPS platform.
Update the paths accordingly.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
---
 MAINTAINERS | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index bddc79ae76e6..1d89029cb89a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -8508,8 +8508,8 @@ INGENIC JZ47xx SoCs
 M:	Paul Cercueil <paul@crapouillou.net>
 S:	Maintained
 F:	arch/mips/boot/dts/ingenic/
-F:	arch/mips/include/asm/mach-jz4740/
-F:	arch/mips/jz4740/
+F:	arch/mips/generic/board-ingenic.c
+F:	arch/mips/ingenic/Kconfig
 F:	drivers/clk/ingenic/
 F:	drivers/dma/dma-jz4780.c
 F:	drivers/gpu/drm/ingenic/
-- 
2.27.0


^ permalink raw reply related	[flat|nested] 27+ messages in thread

* Re: [PATCH 00/13] MIPS: Convert Ingenic to a generic board
  2020-08-03 17:01 [PATCH 00/13] MIPS: Convert Ingenic to a generic board Paul Cercueil
                   ` (12 preceding siblings ...)
  2020-08-03 17:01 ` [PATCH 13/13] MAINTAINERS: Update paths to Ingenic platform code Paul Cercueil
@ 2020-08-07 16:23 ` Zhou Yanjie
  2020-08-07 16:45   ` Paul Cercueil
  13 siblings, 1 reply; 27+ messages in thread
From: Zhou Yanjie @ 2020-08-07 16:23 UTC (permalink / raw)
  To: Paul Cercueil, Thomas Bogendoerfer
  Cc: Paul Burton, Krzysztof Kozlowski, od, linux-kernel, linux-mips,
	漆鹏振,
	dongsheng.qiu, rick.tyliu, yanfei.li, xuwanhao

Hi Paul,

I'm not too sure if remove "cpu-feature-overrides.h" will cause some 
problems for X2000, because according to my current test on X2000, I 
found that it is somewhat different from the SoCs using XBurst1 CPU 
core, with the kernel source code provided by Ingenic, for example, we 
must configure "#define cpu_has_tlbinv 1" in "cpu-feature-overrides.h" 
to make the X2000 work normally, otherwise the kernel will get stuck. 
And X2000's interrupt controller has also been redesigned. If these 
differences make it impossible to share code, should we set a 
subdirectory of "xburst" and "xburst2" in "arch/mips/ingenic"? (I am 
just worried about this situation, so far I have not been able to 
successfully run the mainline kernel on X2000).

I have added some related engineers from Ingenic to CC

Thanks and best regards!

在 2020/8/4 上午1:01, Paul Cercueil 写道:
> Hi Thomas & list,
>
> Here is a set of patches for 5.10 (no rush) to move Ingenic support from
> arch/mips/jz4740/ to arch/mips/generic/.
>
> There are some Kconfig changes that I think should be reviewed in detail
> to avoid breakages elsewhere. The idea behind these changes is to allow
> the Ingenic "generic" code to be built in a non-generic kernel, since
> generic kernels bring lots of dependencies which result in a +7% size
> increase.
>
> Support for booting the generic kernel with a built-in and/or appended
> devicetree, as well as support for compressed (vmlinuz) kernels, has
> been added as well.
>
> Cheers,
> -Paul
>
> Paul Cercueil (13):
>    MIPS: cpu-probe: Set Ingenic's writecombine to _CACHE_CACHABLE_WA
>    MIPS: cpu-probe: Mark XBurst CPU as having vtagged caches
>    MIPS: cpu-probe: ingenic: Fix broken BUG_ON
>    MIPS: Kconfig: add MIPS_GENERIC_KERNEL symbol
>    MIPS: machine: Add get_system_type callback
>    MIPS: generic: Call the machine's .get_system_type callback if
>      provided
>    MIPS: generic: Support booting with built-in or appended DTB
>    MIPS: generic: Add support for zboot
>    MIPS: generic: Increase NR_IRQS to 256
>    MIPS: generic: Add support for Ingenic SoCs
>    MIPS: jz4740: Drop folder
>    MIPS: configs: Regenerate configs of Ingenic boards
>    MAINTAINERS: Update paths to Ingenic platform code
>
>   MAINTAINERS                                   |   4 +-
>   arch/mips/Kbuild.platforms                    |   1 -
>   arch/mips/Kconfig                             |  43 ++++--
>   arch/mips/configs/ci20_defconfig              |   4 +-
>   arch/mips/configs/cu1000-neo_defconfig        |  16 +-
>   arch/mips/configs/gcw0_defconfig              |   2 +-
>   arch/mips/configs/qi_lb60_defconfig           |   5 +-
>   arch/mips/configs/rs90_defconfig              |   4 +-
>   arch/mips/generic/Kconfig                     |   8 +-
>   arch/mips/generic/Makefile                    |   2 +-
>   arch/mips/generic/Platform                    |   1 +
>   arch/mips/generic/board-ingenic.c             | 108 +++++++++++++
>   arch/mips/generic/init.c                      |  28 +++-
>   arch/mips/generic/proc.c                      |  25 ---
>   arch/mips/include/asm/mach-generic/irq.h      |   2 +-
>   .../asm/mach-jz4740/cpu-feature-overrides.h   |  50 ------
>   arch/mips/include/asm/mach-jz4740/irq.h       |  13 --
>   arch/mips/include/asm/machine.h               |   1 +
>   arch/mips/include/asm/pgtable-bits.h          |   5 -
>   arch/mips/{jz4740 => ingenic}/Kconfig         |  16 +-
>   arch/mips/jz4740/Makefile                     |   9 --
>   arch/mips/jz4740/Platform                     |   3 -
>   arch/mips/jz4740/setup.c                      | 145 ------------------
>   arch/mips/kernel/cpu-probe.c                  |   8 +-
>   24 files changed, 198 insertions(+), 305 deletions(-)
>   create mode 100644 arch/mips/generic/board-ingenic.c
>   delete mode 100644 arch/mips/generic/proc.c
>   delete mode 100644 arch/mips/include/asm/mach-jz4740/cpu-feature-overrides.h
>   delete mode 100644 arch/mips/include/asm/mach-jz4740/irq.h
>   rename arch/mips/{jz4740 => ingenic}/Kconfig (91%)
>   delete mode 100644 arch/mips/jz4740/Makefile
>   delete mode 100644 arch/mips/jz4740/Platform
>   delete mode 100644 arch/mips/jz4740/setup.c
>

^ permalink raw reply	[flat|nested] 27+ messages in thread

* Re: [PATCH 00/13] MIPS: Convert Ingenic to a generic board
  2020-08-07 16:23 ` [PATCH 00/13] MIPS: Convert Ingenic to a generic board Zhou Yanjie
@ 2020-08-07 16:45   ` Paul Cercueil
  2020-08-07 17:20     ` Zhou Yanjie
                       ` (2 more replies)
  0 siblings, 3 replies; 27+ messages in thread
From: Paul Cercueil @ 2020-08-07 16:45 UTC (permalink / raw)
  To: Zhou Yanjie
  Cc: Thomas Bogendoerfer, Paul Burton, Krzysztof Kozlowski, od,
	linux-kernel, linux-mips, 漆鹏振,
	dongsheng.qiu, rick.tyliu, yanfei.li, xuwanhao

Hi Zhou,

Le sam. 8 août 2020 à 0:23, Zhou Yanjie <zhouyanjie@wanyeetech.com> a 
écrit :
> Hi Paul,
> 
> I'm not too sure if remove "cpu-feature-overrides.h" will cause some 
> problems for X2000, because according to my current test on X2000, I 
> found that it is somewhat different from the SoCs using XBurst1 CPU 
> core, with the kernel source code provided by Ingenic, for example, 
> we must configure "#define cpu_has_tlbinv 1" in 
> "cpu-feature-overrides.h" to make the X2000 work normally, otherwise 
> the kernel will get stuck. And X2000's interrupt controller has also 
> been redesigned. If these differences make it impossible to share 
> code, should we set a subdirectory of "xburst" and "xburst2" in 
> "arch/mips/ingenic"? (I am just worried about this situation, so far 
> I have not been able to successfully run the mainline kernel on 
> X2000).

The <cpu-feature-overrides.h> is kind of a hack, to hardcode settings 
in case the CPU is not properly detected. The cpu-probe.c should be 
able to auto-detect these settings, including the inverted TLB that the 
X2000 has, reading from the CPU config registers ("TLB INV" info should 
be in config4). Right now cpu_probe_ingenic() doesn't read config4 (not 
present on older SoCs) but that's trivial to add.

As for your other question, I don't see any reason why we wouldn't be 
able to support the X2000 aside the others in a generic kernel, so 
don't worry :)

Cheers,
-Paul

> 
> I have added some related engineers from Ingenic to CC
> 
> Thanks and best regards!
> 
> 在 2020/8/4 上午1:01, Paul Cercueil 写道:
>> Hi Thomas & list,
>> 
>> Here is a set of patches for 5.10 (no rush) to move Ingenic support 
>> from
>> arch/mips/jz4740/ to arch/mips/generic/.
>> 
>> There are some Kconfig changes that I think should be reviewed in 
>> detail
>> to avoid breakages elsewhere. The idea behind these changes is to 
>> allow
>> the Ingenic "generic" code to be built in a non-generic kernel, since
>> generic kernels bring lots of dependencies which result in a +7% size
>> increase.
>> 
>> Support for booting the generic kernel with a built-in and/or 
>> appended
>> devicetree, as well as support for compressed (vmlinuz) kernels, has
>> been added as well.
>> 
>> Cheers,
>> -Paul
>> 
>> Paul Cercueil (13):
>>    MIPS: cpu-probe: Set Ingenic's writecombine to _CACHE_CACHABLE_WA
>>    MIPS: cpu-probe: Mark XBurst CPU as having vtagged caches
>>    MIPS: cpu-probe: ingenic: Fix broken BUG_ON
>>    MIPS: Kconfig: add MIPS_GENERIC_KERNEL symbol
>>    MIPS: machine: Add get_system_type callback
>>    MIPS: generic: Call the machine's .get_system_type callback if
>>      provided
>>    MIPS: generic: Support booting with built-in or appended DTB
>>    MIPS: generic: Add support for zboot
>>    MIPS: generic: Increase NR_IRQS to 256
>>    MIPS: generic: Add support for Ingenic SoCs
>>    MIPS: jz4740: Drop folder
>>    MIPS: configs: Regenerate configs of Ingenic boards
>>    MAINTAINERS: Update paths to Ingenic platform code
>> 
>>   MAINTAINERS                                   |   4 +-
>>   arch/mips/Kbuild.platforms                    |   1 -
>>   arch/mips/Kconfig                             |  43 ++++--
>>   arch/mips/configs/ci20_defconfig              |   4 +-
>>   arch/mips/configs/cu1000-neo_defconfig        |  16 +-
>>   arch/mips/configs/gcw0_defconfig              |   2 +-
>>   arch/mips/configs/qi_lb60_defconfig           |   5 +-
>>   arch/mips/configs/rs90_defconfig              |   4 +-
>>   arch/mips/generic/Kconfig                     |   8 +-
>>   arch/mips/generic/Makefile                    |   2 +-
>>   arch/mips/generic/Platform                    |   1 +
>>   arch/mips/generic/board-ingenic.c             | 108 +++++++++++++
>>   arch/mips/generic/init.c                      |  28 +++-
>>   arch/mips/generic/proc.c                      |  25 ---
>>   arch/mips/include/asm/mach-generic/irq.h      |   2 +-
>>   .../asm/mach-jz4740/cpu-feature-overrides.h   |  50 ------
>>   arch/mips/include/asm/mach-jz4740/irq.h       |  13 --
>>   arch/mips/include/asm/machine.h               |   1 +
>>   arch/mips/include/asm/pgtable-bits.h          |   5 -
>>   arch/mips/{jz4740 => ingenic}/Kconfig         |  16 +-
>>   arch/mips/jz4740/Makefile                     |   9 --
>>   arch/mips/jz4740/Platform                     |   3 -
>>   arch/mips/jz4740/setup.c                      | 145 
>> ------------------
>>   arch/mips/kernel/cpu-probe.c                  |   8 +-
>>   24 files changed, 198 insertions(+), 305 deletions(-)
>>   create mode 100644 arch/mips/generic/board-ingenic.c
>>   delete mode 100644 arch/mips/generic/proc.c
>>   delete mode 100644 
>> arch/mips/include/asm/mach-jz4740/cpu-feature-overrides.h
>>   delete mode 100644 arch/mips/include/asm/mach-jz4740/irq.h
>>   rename arch/mips/{jz4740 => ingenic}/Kconfig (91%)
>>   delete mode 100644 arch/mips/jz4740/Makefile
>>   delete mode 100644 arch/mips/jz4740/Platform
>>   delete mode 100644 arch/mips/jz4740/setup.c
>> 



^ permalink raw reply	[flat|nested] 27+ messages in thread

* Re: [PATCH 00/13] MIPS: Convert Ingenic to a generic board
  2020-08-07 16:45   ` Paul Cercueil
@ 2020-08-07 17:20     ` Zhou Yanjie
  2020-08-08  2:39     ` Jiaxun Yang
  2020-08-21 19:23     ` Maciej W. Rozycki
  2 siblings, 0 replies; 27+ messages in thread
From: Zhou Yanjie @ 2020-08-07 17:20 UTC (permalink / raw)
  To: Paul Cercueil
  Cc: Thomas Bogendoerfer, Paul Burton, Krzysztof Kozlowski, od,
	linux-kernel, linux-mips, 漆鹏振,
	dongsheng.qiu, rick.tyliu, yanfei.li, xuwanhao

Hi Paul,

在 2020/8/8 上午12:45, Paul Cercueil 写道:
> Hi Zhou,
>
> Le sam. 8 août 2020 à 0:23, Zhou Yanjie <zhouyanjie@wanyeetech.com> a 
> écrit :
>> Hi Paul,
>>
>> I'm not too sure if remove "cpu-feature-overrides.h" will cause some 
>> problems for X2000, because according to my current test on X2000, I 
>> found that it is somewhat different from the SoCs using XBurst1 CPU 
>> core, with the kernel source code provided by Ingenic, for example, 
>> we must configure "#define cpu_has_tlbinv 1" in 
>> "cpu-feature-overrides.h" to make the X2000 work normally, otherwise 
>> the kernel will get stuck. And X2000's interrupt controller has also 
>> been redesigned. If these differences make it impossible to share 
>> code, should we set a subdirectory of "xburst" and "xburst2" in 
>> "arch/mips/ingenic"? (I am just worried about this situation, so far 
>> I have not been able to successfully run the mainline kernel on X2000).
>
> The <cpu-feature-overrides.h> is kind of a hack, to hardcode settings 
> in case the CPU is not properly detected. The cpu-probe.c should be 
> able to auto-detect these settings, including the inverted TLB that 
> the X2000 has, reading from the CPU config registers ("TLB INV" info 
> should be in config4). Right now cpu_probe_ingenic() doesn't read 
> config4 (not present on older SoCs) but that's trivial to add.
>
> As for your other question, I don't see any reason why we wouldn't be 
> able to support the X2000 aside the others in a generic kernel, so 
> don't worry :)
>
OK, this is good news for me.


> Cheers,
> -Paul
>
>>
>> I have added some related engineers from Ingenic to CC
>>
>> Thanks and best regards!
>>
>> 在 2020/8/4 上午1:01, Paul Cercueil 写道:
>>> Hi Thomas & list,
>>>
>>> Here is a set of patches for 5.10 (no rush) to move Ingenic support 
>>> from
>>> arch/mips/jz4740/ to arch/mips/generic/.
>>>
>>> There are some Kconfig changes that I think should be reviewed in 
>>> detail
>>> to avoid breakages elsewhere. The idea behind these changes is to allow
>>> the Ingenic "generic" code to be built in a non-generic kernel, since
>>> generic kernels bring lots of dependencies which result in a +7% size
>>> increase.
>>>
>>> Support for booting the generic kernel with a built-in and/or appended
>>> devicetree, as well as support for compressed (vmlinuz) kernels, has
>>> been added as well.
>>>
>>> Cheers,
>>> -Paul
>>>
>>> Paul Cercueil (13):
>>>    MIPS: cpu-probe: Set Ingenic's writecombine to _CACHE_CACHABLE_WA
>>>    MIPS: cpu-probe: Mark XBurst CPU as having vtagged caches
>>>    MIPS: cpu-probe: ingenic: Fix broken BUG_ON
>>>    MIPS: Kconfig: add MIPS_GENERIC_KERNEL symbol
>>>    MIPS: machine: Add get_system_type callback
>>>    MIPS: generic: Call the machine's .get_system_type callback if
>>>      provided
>>>    MIPS: generic: Support booting with built-in or appended DTB
>>>    MIPS: generic: Add support for zboot
>>>    MIPS: generic: Increase NR_IRQS to 256
>>>    MIPS: generic: Add support for Ingenic SoCs
>>>    MIPS: jz4740: Drop folder
>>>    MIPS: configs: Regenerate configs of Ingenic boards
>>>    MAINTAINERS: Update paths to Ingenic platform code
>>>
>>>   MAINTAINERS                                   |   4 +-
>>>   arch/mips/Kbuild.platforms                    |   1 -
>>>   arch/mips/Kconfig                             |  43 ++++--
>>>   arch/mips/configs/ci20_defconfig              |   4 +-
>>>   arch/mips/configs/cu1000-neo_defconfig        |  16 +-
>>>   arch/mips/configs/gcw0_defconfig              |   2 +-
>>>   arch/mips/configs/qi_lb60_defconfig           |   5 +-
>>>   arch/mips/configs/rs90_defconfig              |   4 +-
>>>   arch/mips/generic/Kconfig                     |   8 +-
>>>   arch/mips/generic/Makefile                    |   2 +-
>>>   arch/mips/generic/Platform                    |   1 +
>>>   arch/mips/generic/board-ingenic.c             | 108 +++++++++++++
>>>   arch/mips/generic/init.c                      |  28 +++-
>>>   arch/mips/generic/proc.c                      |  25 ---
>>>   arch/mips/include/asm/mach-generic/irq.h      |   2 +-
>>>   .../asm/mach-jz4740/cpu-feature-overrides.h   |  50 ------
>>>   arch/mips/include/asm/mach-jz4740/irq.h       |  13 --
>>>   arch/mips/include/asm/machine.h               |   1 +
>>>   arch/mips/include/asm/pgtable-bits.h          |   5 -
>>>   arch/mips/{jz4740 => ingenic}/Kconfig         |  16 +-
>>>   arch/mips/jz4740/Makefile                     |   9 --
>>>   arch/mips/jz4740/Platform                     |   3 -
>>>   arch/mips/jz4740/setup.c                      | 145 
>>> ------------------
>>>   arch/mips/kernel/cpu-probe.c                  |   8 +-
>>>   24 files changed, 198 insertions(+), 305 deletions(-)
>>>   create mode 100644 arch/mips/generic/board-ingenic.c
>>>   delete mode 100644 arch/mips/generic/proc.c
>>>   delete mode 100644 
>>> arch/mips/include/asm/mach-jz4740/cpu-feature-overrides.h
>>>   delete mode 100644 arch/mips/include/asm/mach-jz4740/irq.h
>>>   rename arch/mips/{jz4740 => ingenic}/Kconfig (91%)
>>>   delete mode 100644 arch/mips/jz4740/Makefile
>>>   delete mode 100644 arch/mips/jz4740/Platform
>>>   delete mode 100644 arch/mips/jz4740/setup.c
>>>
>

^ permalink raw reply	[flat|nested] 27+ messages in thread

* Re: [PATCH 13/13] MAINTAINERS: Update paths to Ingenic platform code
  2020-08-03 17:01 ` [PATCH 13/13] MAINTAINERS: Update paths to Ingenic platform code Paul Cercueil
@ 2020-08-07 17:22   ` Zhou Yanjie
  2020-08-07 17:43     ` Zhou Yanjie
  0 siblings, 1 reply; 27+ messages in thread
From: Zhou Yanjie @ 2020-08-07 17:22 UTC (permalink / raw)
  To: Paul Cercueil, Thomas Bogendoerfer
  Cc: Paul Burton, Krzysztof Kozlowski, od, linux-kernel, linux-mips

Hi Paul,

在 2020/8/4 上午1:01, Paul Cercueil 写道:
> Support for Ingenic chips has been moved to the generic MIPS platform.
> Update the paths accordingly.

The modification to "cu1830-neo_defconfig" seems to be missed here.

Thanks and best regards!

>
> Signed-off-by: Paul Cercueil <paul@crapouillou.net>
> ---
>   MAINTAINERS | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index bddc79ae76e6..1d89029cb89a 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -8508,8 +8508,8 @@ INGENIC JZ47xx SoCs
>   M:	Paul Cercueil <paul@crapouillou.net>
>   S:	Maintained
>   F:	arch/mips/boot/dts/ingenic/
> -F:	arch/mips/include/asm/mach-jz4740/
> -F:	arch/mips/jz4740/
> +F:	arch/mips/generic/board-ingenic.c
> +F:	arch/mips/ingenic/Kconfig
>   F:	drivers/clk/ingenic/
>   F:	drivers/dma/dma-jz4780.c
>   F:	drivers/gpu/drm/ingenic/

^ permalink raw reply	[flat|nested] 27+ messages in thread

* Re: [PATCH 13/13] MAINTAINERS: Update paths to Ingenic platform code
  2020-08-07 17:22   ` Zhou Yanjie
@ 2020-08-07 17:43     ` Zhou Yanjie
  0 siblings, 0 replies; 27+ messages in thread
From: Zhou Yanjie @ 2020-08-07 17:43 UTC (permalink / raw)
  To: Paul Cercueil, Thomas Bogendoerfer
  Cc: Paul Burton, Krzysztof Kozlowski, od, linux-kernel, linux-mips


在 2020/8/8 上午1:22, Zhou Yanjie 写道:
> Hi Paul,
>
> 在 2020/8/4 上午1:01, Paul Cercueil 写道:
>> Support for Ingenic chips has been moved to the generic MIPS platform.
>> Update the paths accordingly.
>
> The modification to "cu1830-neo_defconfig" seems to be missed here.
>
Sorry, this should be a reply to [12/13]  :(
> Thanks and best regards!
>
>>
>> Signed-off-by: Paul Cercueil <paul@crapouillou.net>
>> ---
>>   MAINTAINERS | 4 ++--
>>   1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/MAINTAINERS b/MAINTAINERS
>> index bddc79ae76e6..1d89029cb89a 100644
>> --- a/MAINTAINERS
>> +++ b/MAINTAINERS
>> @@ -8508,8 +8508,8 @@ INGENIC JZ47xx SoCs
>>   M:    Paul Cercueil <paul@crapouillou.net>
>>   S:    Maintained
>>   F:    arch/mips/boot/dts/ingenic/
>> -F:    arch/mips/include/asm/mach-jz4740/
>> -F:    arch/mips/jz4740/
>> +F:    arch/mips/generic/board-ingenic.c
>> +F:    arch/mips/ingenic/Kconfig
>>   F:    drivers/clk/ingenic/
>>   F:    drivers/dma/dma-jz4780.c
>>   F:    drivers/gpu/drm/ingenic/

^ permalink raw reply	[flat|nested] 27+ messages in thread

* Re: [PATCH 00/13] MIPS: Convert Ingenic to a generic board
  2020-08-07 16:45   ` Paul Cercueil
  2020-08-07 17:20     ` Zhou Yanjie
@ 2020-08-08  2:39     ` Jiaxun Yang
  2020-08-21 19:23     ` Maciej W. Rozycki
  2 siblings, 0 replies; 27+ messages in thread
From: Jiaxun Yang @ 2020-08-08  2:39 UTC (permalink / raw)
  To: Zhou Yanjie
  Cc: Paul Cercueil, Krzysztof Kozlowski, od, linux-kernel, linux-mips,
	漆鹏振,
	dongsheng.qiu, rick.tyliu, yanfei.li, xuwanhao



在 2020/8/8 上午12:45, Paul Cercueil 写道:
> Hi Zhou,
>
> Le sam. 8 août 2020 à 0:23, Zhou Yanjie <zhouyanjie@wanyeetech.com> a 
> écrit :
>> Hi Paul,
>>
>> I'm not too sure if remove "cpu-feature-overrides.h" will cause some 
>> problems for X2000, because according to my current test on X2000, I 
>> found that it is somewhat different from the SoCs using XBurst1 CPU 
>> core, with the kernel source code provided by Ingenic, for example, 
>> we must configure "#define cpu_has_tlbinv 1" in 
>> "cpu-feature-overrides.h" to make the X2000 work normally, otherwise 
>> the kernel will get stuck. And X2000's interrupt controller has also 
>> been redesigned. If these differences make it impossible to share 
>> code, should we set a subdirectory of "xburst" and "xburst2" in 
>> "arch/mips/ingenic"? (I am just worried about this situation, so far 
>> I have not been able to successfully run the mainline kernel on X2000).

Hi Yanjie,

TLBINV is a optional feature. We can always invalidate TLB via rewrite 
TLB entry. If X2000 can't work
without TLBINV it means there are some thing went wrong with TLB.
You'd better investigate in detail.

Refined interrupt controller can be enabled via DeviceTree, you only 
have to write a new irqchip driver for it.

Btw: My X2000 EVB is on the way thanks to Taobao~

Thanks.

>
> The <cpu-feature-overrides.h> is kind of a hack, to hardcode settings 
> in case the CPU is not properly detected. The cpu-probe.c should be 
> able to auto-detect these settings, including the inverted TLB that 
> the X2000 has, reading from the CPU config registers ("TLB INV" info 
> should be in config4). Right now cpu_probe_ingenic() doesn't read 
> config4 (not present on older SoCs) but that's trivial to add.
>
> As for your other question, I don't see any reason why we wouldn't be 
> able to support the X2000 aside the others in a generic kernel, so 
> don't worry :)
>
> Cheers,
> -Paul
>

^ permalink raw reply	[flat|nested] 27+ messages in thread

* Re: [PATCH 06/13] MIPS: generic: Call the machine's .get_system_type callback if provided
  2020-08-03 17:01 ` [PATCH 06/13] MIPS: generic: Call the machine's .get_system_type callback if provided Paul Cercueil
@ 2020-08-11 12:43   ` Paul Cercueil
  0 siblings, 0 replies; 27+ messages in thread
From: Paul Cercueil @ 2020-08-11 12:43 UTC (permalink / raw)
  To: Thomas Bogendoerfer
  Cc: Paul Burton, Krzysztof Kozlowski, 周琰杰,
	od, linux-kernel, linux-mips



Le lun. 3 août 2020 à 19:01, Paul Cercueil <paul@crapouillou.net> a 
écrit :
> Call the machine's .get_system_type callback in the global
> get_system_type() function, if it was provided by the mips_machine
> implementation.
> 
> The get_system_type() function had to be moved within init.c to be 
> able
> to use the static variable "mach". Therefore the proc.c, now empty, 
> has
> been removed.
> 
> Signed-off-by: Paul Cercueil <paul@crapouillou.net>
> ---
>  arch/mips/generic/Makefile |  1 -
>  arch/mips/generic/init.c   | 19 +++++++++++++++++++
>  arch/mips/generic/proc.c   | 25 -------------------------
>  3 files changed, 19 insertions(+), 26 deletions(-)
>  delete mode 100644 arch/mips/generic/proc.c
> 
> diff --git a/arch/mips/generic/Makefile b/arch/mips/generic/Makefile
> index 2384a6b09e4c..f49aeede93c2 100644
> --- a/arch/mips/generic/Makefile
> +++ b/arch/mips/generic/Makefile
> @@ -6,7 +6,6 @@
> 
>  obj-y += init.o
>  obj-y += irq.o
> -obj-y += proc.o
> 
>  obj-$(CONFIG_YAMON_DT_SHIM)		+= yamon-dt.o
>  obj-$(CONFIG_LEGACY_BOARD_SEAD3)	+= board-sead3.o
> diff --git a/arch/mips/generic/init.c b/arch/mips/generic/init.c
> index 805d0135a9f4..7d82b436939e 100644
> --- a/arch/mips/generic/init.c
> +++ b/arch/mips/generic/init.c
> @@ -207,3 +207,22 @@ void __init arch_init_irq(void)
>  void __init prom_free_prom_memory(void)
>  {
>  }
> +
> +const char *get_system_type(void)
> +{
> +	const char *str;
> +	int err;
> +
> +	if (mach && mach->get_system_type)
> +		return mach->get_system_type(of_root);

The 'mach' variable is __initconst, so there's a section violation 
right here. I'll send a V2.

-Paul

> +
> +	err = of_property_read_string(of_root, "model", &str);
> +	if (!err)
> +		return str;
> +
> +	err = of_property_read_string_index(of_root, "compatible", 0, &str);
> +	if (!err)
> +		return str;
> +
> +	return "Unknown";
> +}
> diff --git a/arch/mips/generic/proc.c b/arch/mips/generic/proc.c
> deleted file mode 100644
> index 4c992809cc3f..000000000000
> --- a/arch/mips/generic/proc.c
> +++ /dev/null
> @@ -1,25 +0,0 @@
> -// SPDX-License-Identifier: GPL-2.0-or-later
> -/*
> - * Copyright (C) 2016 Imagination Technologies
> - * Author: Paul Burton <paul.burton@mips.com>
> - */
> -
> -#include <linux/of.h>
> -
> -#include <asm/bootinfo.h>
> -
> -const char *get_system_type(void)
> -{
> -	const char *str;
> -	int err;
> -
> -	err = of_property_read_string(of_root, "model", &str);
> -	if (!err)
> -		return str;
> -
> -	err = of_property_read_string_index(of_root, "compatible", 0, &str);
> -	if (!err)
> -		return str;
> -
> -	return "Unknown";
> -}
> --
> 2.27.0
> 



^ permalink raw reply	[flat|nested] 27+ messages in thread

* Re: [PATCH 00/13] MIPS: Convert Ingenic to a generic board
  2020-08-07 16:45   ` Paul Cercueil
  2020-08-07 17:20     ` Zhou Yanjie
  2020-08-08  2:39     ` Jiaxun Yang
@ 2020-08-21 19:23     ` Maciej W. Rozycki
  2020-08-21 23:19       ` Paul Cercueil
  2 siblings, 1 reply; 27+ messages in thread
From: Maciej W. Rozycki @ 2020-08-21 19:23 UTC (permalink / raw)
  To: Paul Cercueil
  Cc: Zhou Yanjie, Thomas Bogendoerfer, Paul Burton,
	Krzysztof Kozlowski, od, linux-kernel, linux-mips,
	漆鹏振,
	dongsheng.qiu, rick.tyliu, yanfei.li, xuwanhao

On Fri, 7 Aug 2020, Paul Cercueil wrote:

> > I'm not too sure if remove "cpu-feature-overrides.h" will cause some
> > problems for X2000, because according to my current test on X2000, I found
> > that it is somewhat different from the SoCs using XBurst1 CPU core, with the
> > kernel source code provided by Ingenic, for example, we must configure
> > "#define cpu_has_tlbinv 1" in "cpu-feature-overrides.h" to make the X2000
> > work normally, otherwise the kernel will get stuck. And X2000's interrupt
> > controller has also been redesigned. If these differences make it impossible
> > to share code, should we set a subdirectory of "xburst" and "xburst2" in
> > "arch/mips/ingenic"? (I am just worried about this situation, so far I have
> > not been able to successfully run the mainline kernel on X2000).
> 
> The <cpu-feature-overrides.h> is kind of a hack, to hardcode settings in case
> the CPU is not properly detected. The cpu-probe.c should be able to
> auto-detect these settings, including the inverted TLB that the X2000 has,
> reading from the CPU config registers ("TLB INV" info should be in config4).
> Right now cpu_probe_ingenic() doesn't read config4 (not present on older SoCs)
> but that's trivial to add.

 FAOD <cpu-feature-overrides.h> is not a hack, but an optimisation measure 
so that features known to be hardwired for a given machine/CPU do not have 
to be dynamically queried every time referred.  In some cases that results 
in large portions of code being optimised away by the compiler as well. 

 The hardcoded value for a feature defined in <cpu-feature-overrides.h> 
always has to be the same as one in the corresponding bit of the `options' 
member of `struct cpuinfo_mips', in this case MIPS_CPU_TLBINV.

  Maciej

^ permalink raw reply	[flat|nested] 27+ messages in thread

* Re: [PATCH 00/13] MIPS: Convert Ingenic to a generic board
  2020-08-21 19:23     ` Maciej W. Rozycki
@ 2020-08-21 23:19       ` Paul Cercueil
  2020-08-22  2:29         ` Maciej W. Rozycki
  0 siblings, 1 reply; 27+ messages in thread
From: Paul Cercueil @ 2020-08-21 23:19 UTC (permalink / raw)
  To: Maciej W. Rozycki
  Cc: Zhou Yanjie, Thomas Bogendoerfer, Paul Burton,
	Krzysztof Kozlowski, od, linux-kernel, linux-mips,
	漆鹏振,
	dongsheng.qiu, rick.tyliu, yanfei.li, xuwanhao

Hi Maciej,

Le ven. 21 août 2020 à 20:23, Maciej W. Rozycki 
<macro@linux-mips.org> a écrit :
> On Fri, 7 Aug 2020, Paul Cercueil wrote:
> 
>>  > I'm not too sure if remove "cpu-feature-overrides.h" will cause 
>> some
>>  > problems for X2000, because according to my current test on 
>> X2000, I found
>>  > that it is somewhat different from the SoCs using XBurst1 CPU 
>> core, with the
>>  > kernel source code provided by Ingenic, for example, we must 
>> configure
>>  > "#define cpu_has_tlbinv 1" in "cpu-feature-overrides.h" to make 
>> the X2000
>>  > work normally, otherwise the kernel will get stuck. And X2000's 
>> interrupt
>>  > controller has also been redesigned. If these differences make it 
>> impossible
>>  > to share code, should we set a subdirectory of "xburst" and 
>> "xburst2" in
>>  > "arch/mips/ingenic"? (I am just worried about this situation, so 
>> far I have
>>  > not been able to successfully run the mainline kernel on X2000).
>> 
>>  The <cpu-feature-overrides.h> is kind of a hack, to hardcode 
>> settings in case
>>  the CPU is not properly detected. The cpu-probe.c should be able to
>>  auto-detect these settings, including the inverted TLB that the 
>> X2000 has,
>>  reading from the CPU config registers ("TLB INV" info should be in 
>> config4).
>>  Right now cpu_probe_ingenic() doesn't read config4 (not present on 
>> older SoCs)
>>  but that's trivial to add.
> 
>  FAOD <cpu-feature-overrides.h> is not a hack, but an optimisation 
> measure
> so that features known to be hardwired for a given machine/CPU do not 
> have
> to be dynamically queried every time referred.  In some cases that 
> results
> in large portions of code being optimised away by the compiler as 
> well.

Fair enough. Bloat-o-meter reports about ~100 KiB saved when that file 
is present. But we can't use it in a generic kernel, unfortunately.

>  The hardcoded value for a feature defined in 
> <cpu-feature-overrides.h>
> always has to be the same as one in the corresponding bit of the 
> `options'
> member of `struct cpuinfo_mips', in this case MIPS_CPU_TLBINV.

In theory yes, in practice the CPU detection code is lagging behind...

Cheers,
-Paul



^ permalink raw reply	[flat|nested] 27+ messages in thread

* Re: [PATCH 00/13] MIPS: Convert Ingenic to a generic board
  2020-08-21 23:19       ` Paul Cercueil
@ 2020-08-22  2:29         ` Maciej W. Rozycki
  2020-08-22 13:17           ` Paul Cercueil
  2020-10-26 14:25           ` Zhou Yanjie
  0 siblings, 2 replies; 27+ messages in thread
From: Maciej W. Rozycki @ 2020-08-22  2:29 UTC (permalink / raw)
  To: Paul Cercueil
  Cc: Zhou Yanjie, Thomas Bogendoerfer, Paul Burton,
	Krzysztof Kozlowski, od, linux-kernel, linux-mips,
	漆鹏振,
	dongsheng.qiu, rick.tyliu, yanfei.li, xuwanhao

Hi Paul,

> > FAOD <cpu-feature-overrides.h> is not a hack, but an optimisation measure
> > so that features known to be hardwired for a given machine/CPU do not have
> > to be dynamically queried every time referred.  In some cases that results
> > in large portions of code being optimised away by the compiler as well.
> 
> Fair enough. Bloat-o-meter reports about ~100 KiB saved when that file is
> present. But we can't use it in a generic kernel, unfortunately.

 Well, run-time patching might be an alternative to get the best of both 
worlds, but someone would have to reimplement our feature selection system 
to use it.

> > The hardcoded value for a feature defined in <cpu-feature-overrides.h>
> > always has to be the same as one in the corresponding bit of the `options'
> > member of `struct cpuinfo_mips', in this case MIPS_CPU_TLBINV.
> 
> In theory yes, in practice the CPU detection code is lagging behind...

 I wasn't aware of that.  In that case it has been a design abuse which 
has been missed by the maintainer when accepting patches.  It used to be 
the case that run-time detection was accurate and overrides were rather 
lazily added.

 Also I note Ingenic must have had a CPU erratum if our `decode_configs' 
doesn't just work, as the interpretation of CP0.Config[5:0] registers has 
been architectural and mandatory, and that for a reason.  It's only legacy 
MIPS I-IV processors that should require special attention here.

  Maciej

^ permalink raw reply	[flat|nested] 27+ messages in thread

* Re: [PATCH 00/13] MIPS: Convert Ingenic to a generic board
  2020-08-22  2:29         ` Maciej W. Rozycki
@ 2020-08-22 13:17           ` Paul Cercueil
  2020-08-22 14:00             ` Maciej W. Rozycki
  2020-10-26 14:25           ` Zhou Yanjie
  1 sibling, 1 reply; 27+ messages in thread
From: Paul Cercueil @ 2020-08-22 13:17 UTC (permalink / raw)
  To: Maciej W. Rozycki
  Cc: Zhou Yanjie, Thomas Bogendoerfer, Paul Burton,
	Krzysztof Kozlowski, od, linux-kernel, linux-mips,
	漆鹏振,
	dongsheng.qiu, rick.tyliu, yanfei.li, xuwanhao



Le sam. 22 août 2020 à 3:29, Maciej W. Rozycki <macro@linux-mips.org> 
a écrit :
> Hi Paul,
> 
>>  > FAOD <cpu-feature-overrides.h> is not a hack, but an optimisation 
>> measure
>>  > so that features known to be hardwired for a given machine/CPU do 
>> not have
>>  > to be dynamically queried every time referred.  In some cases 
>> that results
>>  > in large portions of code being optimised away by the compiler as 
>> well.
>> 
>>  Fair enough. Bloat-o-meter reports about ~100 KiB saved when that 
>> file is
>>  present. But we can't use it in a generic kernel, unfortunately.
> 
>  Well, run-time patching might be an alternative to get the best of 
> both
> worlds, but someone would have to reimplement our feature selection 
> system
> to use it.

Would run-time patching allow to drop dead code?

>>  > The hardcoded value for a feature defined in 
>> <cpu-feature-overrides.h>
>>  > always has to be the same as one in the corresponding bit of the 
>> `options'
>>  > member of `struct cpuinfo_mips', in this case MIPS_CPU_TLBINV.
>> 
>>  In theory yes, in practice the CPU detection code is lagging 
>> behind...
> 
>  I wasn't aware of that.  In that case it has been a design abuse 
> which
> has been missed by the maintainer when accepting patches.  It used to 
> be
> the case that run-time detection was accurate and overrides were 
> rather
> lazily added.
> 
>  Also I note Ingenic must have had a CPU erratum if our 
> `decode_configs'
> doesn't just work, as the interpretation of CP0.Config[5:0] registers 
> has
> been architectural and mandatory, and that for a reason.  It's only 
> legacy
> MIPS I-IV processors that should require special attention here.

Yes, Ingenic CPUs have a few bloopers here and there...

-Paul



^ permalink raw reply	[flat|nested] 27+ messages in thread

* Re: [PATCH 00/13] MIPS: Convert Ingenic to a generic board
  2020-08-22 13:17           ` Paul Cercueil
@ 2020-08-22 14:00             ` Maciej W. Rozycki
  0 siblings, 0 replies; 27+ messages in thread
From: Maciej W. Rozycki @ 2020-08-22 14:00 UTC (permalink / raw)
  To: Paul Cercueil
  Cc: Zhou Yanjie, Thomas Bogendoerfer, Paul Burton,
	Krzysztof Kozlowski, od, linux-kernel, linux-mips,
	漆鹏振,
	dongsheng.qiu, rick.tyliu, yanfei.li, xuwanhao

On Sat, 22 Aug 2020, Paul Cercueil wrote:

> > Well, run-time patching might be an alternative to get the best of both
> > worlds, but someone would have to reimplement our feature selection system
> > to use it.
> 
> Would run-time patching allow to drop dead code?

 I don't know offhand.  In principle it should be doable like with init 
sections, but that requires out of line code, so there'd still be some 
performance hit compared to a kernel configuration dedicated to a single 
platform.

  Maciej

^ permalink raw reply	[flat|nested] 27+ messages in thread

* Re: [PATCH 00/13] MIPS: Convert Ingenic to a generic board
  2020-08-22  2:29         ` Maciej W. Rozycki
  2020-08-22 13:17           ` Paul Cercueil
@ 2020-10-26 14:25           ` Zhou Yanjie
  1 sibling, 0 replies; 27+ messages in thread
From: Zhou Yanjie @ 2020-10-26 14:25 UTC (permalink / raw)
  To: Maciej W. Rozycki, Paul Cercueil
  Cc: Thomas Bogendoerfer, Paul Burton, Krzysztof Kozlowski, od,
	linux-kernel, linux-mips, 漆鹏振,
	dongsheng.qiu, rick.tyliu, yanfei.li, xuwanhao

Hello Maciej & Paul,

在 2020/8/22 上午10:29, Maciej W. Rozycki 写道:
> Hi Paul,
>
>>> FAOD <cpu-feature-overrides.h> is not a hack, but an optimisation measure
>>> so that features known to be hardwired for a given machine/CPU do not have
>>> to be dynamically queried every time referred.  In some cases that results
>>> in large portions of code being optimised away by the compiler as well.
>> Fair enough. Bloat-o-meter reports about ~100 KiB saved when that file is
>> present. But we can't use it in a generic kernel, unfortunately.
>   Well, run-time patching might be an alternative to get the best of both
> worlds, but someone would have to reimplement our feature selection system
> to use it.
>
>>> The hardcoded value for a feature defined in <cpu-feature-overrides.h>
>>> always has to be the same as one in the corresponding bit of the `options'
>>> member of `struct cpuinfo_mips', in this case MIPS_CPU_TLBINV.
>> In theory yes, in practice the CPU detection code is lagging behind...
>   I wasn't aware of that.  In that case it has been a design abuse which
> has been missed by the maintainer when accepting patches.  It used to be
> the case that run-time detection was accurate and overrides were rather
> lazily added.
>
>   Also I note Ingenic must have had a CPU erratum if our `decode_configs'
> doesn't just work, as the interpretation of CP0.Config[5:0] registers has
> been architectural and mandatory, and that for a reason.  It's only legacy
> MIPS I-IV processors that should require special attention here.


I think I found the cause of the problem. Ingenic XBurst2's TLBINV is 
operate on entire MMU, according to the description of the MD00090 
document, the IE value in cp0 config4 should be 3 (Ingenic's XBurst2 
Core PM document also shows that the IE value is indeed 3). But the code 
in cpu-probe.c only detects the case where the IE value is equal to 2 
(TLBINV only operate on one TLB entry). Therefore, the kernel mistakenly 
believes that X2000 does not support TLBINV during detection.


Thanks and best regards!


>    Maciej

^ permalink raw reply	[flat|nested] 27+ messages in thread

end of thread, other threads:[~2020-10-26 14:25 UTC | newest]

Thread overview: 27+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-08-03 17:01 [PATCH 00/13] MIPS: Convert Ingenic to a generic board Paul Cercueil
2020-08-03 17:01 ` [PATCH 01/13] MIPS: cpu-probe: Set Ingenic's writecombine to _CACHE_CACHABLE_WA Paul Cercueil
2020-08-03 17:01 ` [PATCH 02/13] MIPS: cpu-probe: Mark XBurst CPU as having vtagged caches Paul Cercueil
2020-08-03 17:01 ` [PATCH 03/13] MIPS: cpu-probe: ingenic: Fix broken BUG_ON Paul Cercueil
2020-08-03 17:01 ` [PATCH 04/13] MIPS: Kconfig: add MIPS_GENERIC_KERNEL symbol Paul Cercueil
2020-08-03 17:01 ` [PATCH 05/13] MIPS: machine: Add get_system_type callback Paul Cercueil
2020-08-03 17:01 ` [PATCH 06/13] MIPS: generic: Call the machine's .get_system_type callback if provided Paul Cercueil
2020-08-11 12:43   ` Paul Cercueil
2020-08-03 17:01 ` [PATCH 07/13] MIPS: generic: Support booting with built-in or appended DTB Paul Cercueil
2020-08-03 17:01 ` [PATCH 08/13] MIPS: generic: Add support for zboot Paul Cercueil
2020-08-03 17:01 ` [PATCH 09/13] MIPS: generic: Increase NR_IRQS to 256 Paul Cercueil
2020-08-03 17:01 ` [PATCH 10/13] MIPS: generic: Add support for Ingenic SoCs Paul Cercueil
2020-08-03 17:01 ` [PATCH 11/13] MIPS: jz4740: Drop folder Paul Cercueil
2020-08-03 17:01 ` [PATCH 12/13] MIPS: configs: Regenerate configs of Ingenic boards Paul Cercueil
2020-08-03 17:01 ` [PATCH 13/13] MAINTAINERS: Update paths to Ingenic platform code Paul Cercueil
2020-08-07 17:22   ` Zhou Yanjie
2020-08-07 17:43     ` Zhou Yanjie
2020-08-07 16:23 ` [PATCH 00/13] MIPS: Convert Ingenic to a generic board Zhou Yanjie
2020-08-07 16:45   ` Paul Cercueil
2020-08-07 17:20     ` Zhou Yanjie
2020-08-08  2:39     ` Jiaxun Yang
2020-08-21 19:23     ` Maciej W. Rozycki
2020-08-21 23:19       ` Paul Cercueil
2020-08-22  2:29         ` Maciej W. Rozycki
2020-08-22 13:17           ` Paul Cercueil
2020-08-22 14:00             ` Maciej W. Rozycki
2020-10-26 14:25           ` Zhou Yanjie

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