From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3B723C433DF for ; Mon, 17 Aug 2020 12:24:40 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 08EFE20786 for ; Mon, 17 Aug 2020 12:24:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728254AbgHQMYi (ORCPT ); Mon, 17 Aug 2020 08:24:38 -0400 Received: from szxga05-in.huawei.com ([45.249.212.191]:9751 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726151AbgHQMYf (ORCPT ); Mon, 17 Aug 2020 08:24:35 -0400 Received: from DGGEMS401-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id 832306C4C976C8803297; Mon, 17 Aug 2020 20:24:30 +0800 (CST) Received: from DESKTOP-5IS4806.china.huawei.com (10.174.187.22) by DGGEMS401-HUB.china.huawei.com (10.3.19.201) with Microsoft SMTP Server id 14.3.487.0; Mon, 17 Aug 2020 20:24:20 +0800 From: Keqian Zhu To: , , , CC: Marc Zyngier , Steven Price , "Andrew Jones" , Catalin Marinas , "Will Deacon" , James Morse , Suzuki K Poulose , , Keqian Zhu Subject: [PATCH 2/2] clocksource: arm_arch_timer: Correct fault programming of CNTKCTL_EL1.EVNTI Date: Mon, 17 Aug 2020 20:24:15 +0800 Message-ID: <20200817122415.6568-3-zhukeqian1@huawei.com> X-Mailer: git-send-email 2.8.4.windows.1 In-Reply-To: <20200817122415.6568-1-zhukeqian1@huawei.com> References: <20200817122415.6568-1-zhukeqian1@huawei.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.174.187.22] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org ARM virtual counter supports event stream, it can only trigger an event when the trigger bit (the value of CNTKCTL_EL1.EVNTI) of CNTVCT_EL0 changes, so the actual period of event stream is 2^(cntkctl_evnti + 1). For example, when the trigger bit is 0, then virtual counter trigger an event for every two cycles. Signed-off-by: Marc Zyngier Signed-off-by: Keqian Zhu --- drivers/clocksource/arm_arch_timer.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index 6e11c60..4140a37 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -794,10 +794,14 @@ static void arch_timer_configure_evtstream(void) { int evt_stream_div, pos; - /* Find the closest power of two to the divisor */ - evt_stream_div = arch_timer_rate / ARCH_TIMER_EVT_STREAM_FREQ; + /* + * Find the closest power of two to the divisor. As the event + * stream can at most be generated at half the frequency of the + * counter, use half the frequency when computing the divider. + */ + evt_stream_div = arch_timer_rate / ARCH_TIMER_EVT_STREAM_FREQ / 2; pos = fls(evt_stream_div); - if (pos > 1 && !(evt_stream_div & (1 << (pos - 2)))) + if ((pos == 1) || (pos > 1 && !(evt_stream_div & (1 << (pos - 2))))) pos--; /* enable event stream */ arch_timer_evtstrm_enable(min(pos, 15)); -- 1.8.3.1