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Mon, 17 Aug 2020 12:43:14 +0000 From: Anup Patel To: Palmer Dabbelt , Paul Walmsley , Albert Ou , Rob Herring , Daniel Lezcano , Thomas Gleixner Cc: Damien Le Moal , Atish Patra , Alistair Francis , Anup Patel , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Anup Patel Subject: [PATCH v7 0/4] Dedicated CLINT timer driver Date: Mon, 17 Aug 2020 18:12:47 +0530 Message-Id: <20200817124251.508183-1-anup.patel@wdc.com> X-Mailer: git-send-email 2.25.1 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: BM1PR01CA0143.INDPRD01.PROD.OUTLOOK.COM (2603:1096:b00:68::13) To DM6PR04MB6201.namprd04.prod.outlook.com (2603:10b6:5:127::32) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from wdc.com (103.15.59.21) by BM1PR01CA0143.INDPRD01.PROD.OUTLOOK.COM (2603:1096:b00:68::13) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3283.15 via Frontend Transport; Mon, 17 Aug 2020 12:43:10 +0000 X-Mailer: git-send-email 2.25.1 X-Originating-IP: [103.15.59.21] X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: 76a6cf1f-2529-4449-69f5-08d842ab1bca X-MS-TrafficTypeDiagnostic: DM6PR04MB3865: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: WDCIPOUTBOUND: EOP-TRUE X-MS-Oob-TLC-OOBClassifiers: OLM:2887; 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X-MS-Exchange-AntiSpam-MessageData: 3KAWdgGRg6IsfZEe+FQKUgAJPiqbfQY5FmFLN1pLlU0QgBJmZKwdt3ZrSH+mUkRAOYiIpVDsFdl8Wj4ue4gY//pPM+Xkn7Xsx033ahZ1yI4UuTIejj3issHifofdsuh3DWZgQVngGGm8Jr4h4ghMLuZbu0rxpc3KhwnsE41xXQh8Vs2AiQfHaGTW9xox9+zft7PAROnImKjlCE5V96Z30egfG0/gyCGFf4hPTJrt21IxVyilfEvKyl15DPkSFOn8RY4J8f2v/SsHibb5j1bEl6ofcO6r+SAUDZt6DLetBtdA+yX2M3RLaJ+6RwVM6rRuMD57eCLVQtl2BhTIzOYAO5UiJJKvrgiWTjOWNSbya0uOfrSxBVSQkWYB7l+VgFK+zYUm94rHWHIBB7S+OW0QM16oE7eJrpxYKQ7N3qVIYqYQe8gtUHkalDREafIrMUyolxbE0C1KN0rj+joqoc+Vf/LL1zZ1BNq/uL9zU+rat+BB1huq3kKhHXHfaA3h0nvQ5ApfsERwvULU8jWz8aGIwafZHuhmxgyJro1EnLERRZ1MJZjMLF6nv/dgo7/v9SzmKepDcP7NJSNT7HaCgOPfrWFSa8E5kRS+1mwqlmCTpIeR6WjW4bAGuwZK/MN2YYcZ3Ft3g3rNlzzAevUF3Bz5Qg== X-OriginatorOrg: wdc.com X-MS-Exchange-CrossTenant-Network-Message-Id: 76a6cf1f-2529-4449-69f5-08d842ab1bca X-MS-Exchange-CrossTenant-AuthSource: DM6PR04MB6201.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Aug 2020 12:43:14.7495 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: b61c8803-16f3-4c35-9b17-6f65f441df86 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: LrbVOAxtwLVzsmDd+rJ+06Gh1Y/1cHHygzHnT2cW4dygxnzwCijT54qXrLLrbyT7ElQjBR61xJofX5JSwLGJXA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR04MB3865 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The current RISC-V timer driver is convoluted and implements two distinct timers: 1. S-mode timer: This is for Linux RISC-V S-mode with MMU. The clocksource is implemented using TIME CSR and clockevent device is implemented using SBI Timer calls. 2. M-mode timer: This is for Linux RISC-V M-mode without MMU. The clocksource is implemented using CLINT MMIO time register and clockevent device is implemented using CLINT MMIO timecmp registers. This patchset removes clint related code from RISC-V timer driver and arch/riscv directory. Instead, the series adds a dedicated MMIO based CLINT driver under drivers/clocksource directory which can be used by Linux RISC-V M-mode (i.e NoMMU Linux RISC-V). The patchset is based up Linux-5.9-rc1 and can be found at riscv_clint_v7 branch of: https://github.com/avpatel/linux.git This series is tested on: 1. QEMU RV64 virt machine using Linux RISC-V S-mode 2. QEMU RV32 virt machine using Linux RISC-V S-mode 3. QEMU RV64 virt machine using Linux RISC-V M-mode (i.e. NoMMU) Changes since v6: - Rebased series on Linux-5.9-rc1 Changes since v5: - Fixed order of compatible strings in PATCH4 - Added "additionalProperties: false" in PATCH4 - Fixed register space size for example DT node in PATCH4 Changes since v4: - Rebased series on Linux-5.8-rc6 - Updated Kconfig option as suggested by Daniel in PATCH2 - Removed per-CPU registered flag in PATCH2 - Addressed nit comments from Atish in PATCH2 Changes since v3: - Updated commit description of PATCH2 - Use clint_get_cycles64() in clint_rdtime() of PATCH2 - Call clockevents_config_and_register() only once for each CPU in clint_timer_starting_cpu of PATCH2 - Select CLINT timer driver from platform Kconfig in PATCH3 - Fixed 'make dt_binding_check' for PATCH4 Changes since v2: - Rebased series on Linux-5.8-rc5 - Squashed PATCH3 onto PATCH2 to preserve GIT bisectability - Moved PATCH4 before PATCH2 to preserve GIT bisectability - Replaced CLINT dt-bindings text document with YAML schema - Use SiFive CLINT compatible string as per SiFive IP block versioning Changes since v1: - Rebased series on Linux-5.8-rc2 - Added pr_warn() for case where ipi_ops not available in PATCH1 - Updated ipi_inject() prototype to use "struct cpumask *" in PATCH1 - Updated CLINT_TIMER kconfig option to depend on RISCV_M_MODE in PATCH4 - Added riscv,clint0 compatible string in DT bindings document Anup Patel (4): RISC-V: Add mechanism to provide custom IPI operations clocksource/drivers: Add CLINT timer driver RISC-V: Remove CLINT related code from timer and arch dt-bindings: timer: Add CLINT bindings .../bindings/timer/sifive,clint.yaml | 60 +++++ arch/riscv/Kconfig | 2 +- arch/riscv/Kconfig.socs | 2 + arch/riscv/configs/nommu_virt_defconfig | 7 +- arch/riscv/include/asm/clint.h | 39 --- arch/riscv/include/asm/smp.h | 19 ++ arch/riscv/include/asm/timex.h | 28 +-- arch/riscv/kernel/Makefile | 2 +- arch/riscv/kernel/clint.c | 44 ---- arch/riscv/kernel/sbi.c | 14 ++ arch/riscv/kernel/setup.c | 2 - arch/riscv/kernel/smp.c | 44 ++-- arch/riscv/kernel/smpboot.c | 4 +- drivers/clocksource/Kconfig | 12 +- drivers/clocksource/Makefile | 1 + drivers/clocksource/timer-clint.c | 226 ++++++++++++++++++ drivers/clocksource/timer-riscv.c | 17 +- include/linux/cpuhotplug.h | 1 + 18 files changed, 371 insertions(+), 153 deletions(-) create mode 100644 Documentation/devicetree/bindings/timer/sifive,clint.yaml delete mode 100644 arch/riscv/include/asm/clint.h delete mode 100644 arch/riscv/kernel/clint.c create mode 100644 drivers/clocksource/timer-clint.c -- 2.25.1