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From: Luca Ceresoli <luca@lucaceresoli.net>
To: linux-fpga@vger.kernel.org
Cc: Luca Ceresoli <luca@lucaceresoli.net>,
	Moritz Fischer <mdf@kernel.org>, Tom Rix <trix@redhat.com>,
	Michal Simek <michal.simek@xilinx.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, Anatolij Gustschin <agust@denx.de>
Subject: [PATCH 3/3] fpga manager: xilinx-spi: remove final dot from dev_err() strings
Date: Mon, 17 Aug 2020 18:59:11 +0200	[thread overview]
Message-ID: <20200817165911.32589-3-luca@lucaceresoli.net> (raw)
In-Reply-To: <20200817165911.32589-1-luca@lucaceresoli.net>

Most dev_err messages in this file have no final dot. Remove the only two
exceptions to make them consistent.

Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
---
 drivers/fpga/xilinx-spi.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/fpga/xilinx-spi.c b/drivers/fpga/xilinx-spi.c
index 2aa942bb1114..557c66136400 100644
--- a/drivers/fpga/xilinx-spi.c
+++ b/drivers/fpga/xilinx-spi.c
@@ -77,7 +77,7 @@ static int xilinx_spi_write_init(struct fpga_manager *mgr,
 	int err;
 
 	if (info->flags & FPGA_MGR_PARTIAL_RECONFIG) {
-		dev_err(&mgr->dev, "Partial reconfiguration not supported.\n");
+		dev_err(&mgr->dev, "Partial reconfiguration not supported\n");
 		return -EINVAL;
 	}
 
@@ -176,7 +176,7 @@ static int xilinx_spi_write_complete(struct fpga_manager *mgr,
 			init_b_asserted ? "CRC error or invalid device\n"
 			: "Missing sync word or incomplete bitstream\n");
 	} else {
-		dev_err(&mgr->dev, "Timeout after config data transfer.\n");
+		dev_err(&mgr->dev, "Timeout after config data transfer\n");
 	}
 
 	return -ETIMEDOUT;
-- 
2.28.0


  parent reply	other threads:[~2020-08-17 17:23 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-08-17 16:59 [PATCH 1/3] fpga manager: xilinx-spi: remove stray comment Luca Ceresoli
2020-08-17 16:59 ` [PATCH 2/3] fpga manager: xilinx-spi: provide better diagnostics on programming failure Luca Ceresoli
2020-08-17 18:15   ` Tom Rix
2020-08-18 10:20     ` Luca Ceresoli
2020-08-18 14:21       ` Tom Rix
2020-08-19 16:32         ` Luca Ceresoli
2020-08-27 14:30           ` Luca Ceresoli
2020-08-17 16:59 ` Luca Ceresoli [this message]
2020-08-20  4:11 ` [PATCH 1/3] fpga manager: xilinx-spi: remove stray comment Moritz Fischer
2020-08-27 14:28   ` Luca Ceresoli

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