From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.1 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CEFEFC433E3 for ; Mon, 17 Aug 2020 17:28:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id AEE8320657 for ; Mon, 17 Aug 2020 17:28:23 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="Ae2OoQ+U" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389474AbgHQR2W (ORCPT ); Mon, 17 Aug 2020 13:28:22 -0400 Received: from m43-7.mailgun.net ([69.72.43.7]:15452 "EHLO m43-7.mailgun.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389418AbgHQRLE (ORCPT ); Mon, 17 Aug 2020 13:11:04 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1597684263; h=In-Reply-To: Content-Type: MIME-Version: References: Message-ID: Subject: Cc: To: From: Date: Sender; bh=IqsNUvABr0OrpoE56YQ1186lSjWEeIkkE5qYTPlZ1U4=; b=Ae2OoQ+U1/a1XiMPhGVVf2vRKJwry+1DPXuKm0wKUn2KAmN7o+a0RSGZc7Qb/dqc6jyCmGS7 YTd0qqE+oiuykT70DvldoYWJefr0xRCqz47ftrPt4eE55RV0dOSJDKqolWbSqIgtyUJagedX Y2p04ZJwL15ml3xW87XSSV99PdU= X-Mailgun-Sending-Ip: 69.72.43.7 X-Mailgun-Sid: WyI0MWYwYSIsICJsaW51eC1rZXJuZWxAdmdlci5rZXJuZWwub3JnIiwgImJlOWU0YSJd Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n09.prod.us-east-1.postgun.com with SMTP id 5f3aba26f2b697637aa36f5e (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Mon, 17 Aug 2020 17:11:02 GMT Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 7229DC4339C; Mon, 17 Aug 2020 17:11:01 +0000 (UTC) Received: from jcrouse1-lnx.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: jcrouse) by smtp.codeaurora.org (Postfix) with ESMTPSA id C4EE4C433C6; Mon, 17 Aug 2020 17:10:59 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org C4EE4C433C6 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=none smtp.mailfrom=jcrouse@codeaurora.org Date: Mon, 17 Aug 2020 11:10:56 -0600 From: Jordan Crouse To: Rob Clark Cc: dri-devel@lists.freedesktop.org, Rob Clark , Sean Paul , David Airlie , Daniel Vetter , "open list:DRM DRIVER FOR MSM ADRENO GPU" , "open list:DRM DRIVER FOR MSM ADRENO GPU" , open list Subject: Re: [PATCH] drm/msm/gpu: make ringbuffer readonly Message-ID: <20200817171056.GA7438@jcrouse1-lnx.qualcomm.com> Mail-Followup-To: Rob Clark , dri-devel@lists.freedesktop.org, Rob Clark , Sean Paul , David Airlie , Daniel Vetter , "open list:DRM DRIVER FOR MSM ADRENO GPU" , "open list:DRM DRIVER FOR MSM ADRENO GPU" , open list References: <20200817162309.362032-1-robdclark@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200817162309.362032-1-robdclark@gmail.com> User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Aug 17, 2020 at 09:23:09AM -0700, Rob Clark wrote: > From: Rob Clark > > The GPU has no business writing into the ringbuffer, let's make it > readonly to the GPU. Yep. There are some additional things we can do in the a6xx family to make this even more robust but for the vast majority of targets out in this world this is a good and necessary fix. Reviewed-by: Jordan Crouse > Fixes: 7198e6b03155 ("drm/msm: add a3xx gpu support") > Signed-off-by: Rob Clark > --- > drivers/gpu/drm/msm/msm_ringbuffer.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/msm/msm_ringbuffer.c b/drivers/gpu/drm/msm/msm_ringbuffer.c > index e397c44cc011..39ecb5a18431 100644 > --- a/drivers/gpu/drm/msm/msm_ringbuffer.c > +++ b/drivers/gpu/drm/msm/msm_ringbuffer.c > @@ -27,7 +27,8 @@ struct msm_ringbuffer *msm_ringbuffer_new(struct msm_gpu *gpu, int id, > ring->id = id; > > ring->start = msm_gem_kernel_new(gpu->dev, MSM_GPU_RINGBUFFER_SZ, > - MSM_BO_WC, gpu->aspace, &ring->bo, &ring->iova); > + MSM_BO_WC | MSM_BO_GPU_READONLY, gpu->aspace, &ring->bo, > + &ring->iova); > > if (IS_ERR(ring->start)) { > ret = PTR_ERR(ring->start); > -- > 2.26.2 > -- The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project