* [PATCH] selftests: kvm: Use a shorter encoding to clear RAX
@ 2020-08-17 17:20 Paolo Bonzini
2020-08-17 17:35 ` Sean Christopherson
2020-08-18 13:21 ` Yang Weijiang
0 siblings, 2 replies; 3+ messages in thread
From: Paolo Bonzini @ 2020-08-17 17:20 UTC (permalink / raw)
To: linux-kernel, kvm; +Cc: Sean Christopherson, peterx, Yang Weijiang, stable
From: Yang Weijiang <weijiang.yang@intel.com>
If debug_regs.c is built with newer binutils, the resulting binary is "optimized"
by the assembler:
asm volatile("ss_start: "
"xor %%rax,%%rax\n\t"
"cpuid\n\t"
"movl $0x1a0,%%ecx\n\t"
"rdmsr\n\t"
: : : "rax", "ecx");
is translated to :
000000000040194e <ss_start>:
40194e: 31 c0 xor %eax,%eax <----- rax->eax?
401950: 0f a2 cpuid
401952: b9 a0 01 00 00 mov $0x1a0,%ecx
401957: 0f 32 rdmsr
As you can see rax is replaced with eax in target binary code.
This causes a difference is the length of xor instruction (2 Byte vs 3 Byte),
and makes the hard-coded instruction length check fail:
/* Instruction lengths starting at ss_start */
int ss_size[4] = {
3, /* xor */ <-------- 2 or 3?
2, /* cpuid */
5, /* mov */
2, /* rdmsr */
};
Encode the shorter version directly and, while at it, fix the "clobbers"
of the asm.
Reported-by: Yang Weijiang <weijiang.yang@intel.com>
Cc: stable@vger.kernel.org
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
tools/testing/selftests/kvm/x86_64/debug_regs.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/tools/testing/selftests/kvm/x86_64/debug_regs.c b/tools/testing/selftests/kvm/x86_64/debug_regs.c
index 8162c58a1234..b8d14f9db5f9 100644
--- a/tools/testing/selftests/kvm/x86_64/debug_regs.c
+++ b/tools/testing/selftests/kvm/x86_64/debug_regs.c
@@ -40,11 +40,11 @@ static void guest_code(void)
/* Single step test, covers 2 basic instructions and 2 emulated */
asm volatile("ss_start: "
- "xor %%rax,%%rax\n\t"
+ "xor %%eax,%%eax\n\t"
"cpuid\n\t"
"movl $0x1a0,%%ecx\n\t"
"rdmsr\n\t"
- : : : "rax", "ecx");
+ : : : "eax", "ebx", "ecx", "edx");
/* DR6.BD test */
asm volatile("bd_start: mov %%dr0, %%rax" : : : "rax");
--
2.26.2
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] selftests: kvm: Use a shorter encoding to clear RAX
2020-08-17 17:20 [PATCH] selftests: kvm: Use a shorter encoding to clear RAX Paolo Bonzini
@ 2020-08-17 17:35 ` Sean Christopherson
2020-08-18 13:21 ` Yang Weijiang
1 sibling, 0 replies; 3+ messages in thread
From: Sean Christopherson @ 2020-08-17 17:35 UTC (permalink / raw)
To: Paolo Bonzini; +Cc: linux-kernel, kvm, peterx, Yang Weijiang, stable
On Mon, Aug 17, 2020 at 01:20:34PM -0400, Paolo Bonzini wrote:
> From: Yang Weijiang <weijiang.yang@intel.com>
This shouldn't be here without Weijiang's SOB.
> If debug_regs.c is built with newer binutils, the resulting binary is "optimized"
> by the assembler:
>
> asm volatile("ss_start: "
> "xor %%rax,%%rax\n\t"
> "cpuid\n\t"
> "movl $0x1a0,%%ecx\n\t"
> "rdmsr\n\t"
> : : : "rax", "ecx");
>
> is translated to :
>
> 000000000040194e <ss_start>:
> 40194e: 31 c0 xor %eax,%eax <----- rax->eax?
> 401950: 0f a2 cpuid
> 401952: b9 a0 01 00 00 mov $0x1a0,%ecx
> 401957: 0f 32 rdmsr
>
> As you can see rax is replaced with eax in target binary code.
> This causes a difference is the length of xor instruction (2 Byte vs 3 Byte),
> and makes the hard-coded instruction length check fail:
>
> /* Instruction lengths starting at ss_start */
> int ss_size[4] = {
> 3, /* xor */ <-------- 2 or 3?
> 2, /* cpuid */
> 5, /* mov */
> 2, /* rdmsr */
> };
>
> Encode the shorter version directly and, while at it, fix the "clobbers"
> of the asm.
>
> Reported-by: Yang Weijiang <weijiang.yang@intel.com>
> Cc: stable@vger.kernel.org
> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Sean Christopherson <sean.j.christopherson@intel.com>
> ---
> tools/testing/selftests/kvm/x86_64/debug_regs.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/tools/testing/selftests/kvm/x86_64/debug_regs.c b/tools/testing/selftests/kvm/x86_64/debug_regs.c
> index 8162c58a1234..b8d14f9db5f9 100644
> --- a/tools/testing/selftests/kvm/x86_64/debug_regs.c
> +++ b/tools/testing/selftests/kvm/x86_64/debug_regs.c
> @@ -40,11 +40,11 @@ static void guest_code(void)
>
> /* Single step test, covers 2 basic instructions and 2 emulated */
> asm volatile("ss_start: "
> - "xor %%rax,%%rax\n\t"
> + "xor %%eax,%%eax\n\t"
> "cpuid\n\t"
> "movl $0x1a0,%%ecx\n\t"
> "rdmsr\n\t"
> - : : : "rax", "ecx");
> + : : : "eax", "ebx", "ecx", "edx");
>
> /* DR6.BD test */
> asm volatile("bd_start: mov %%dr0, %%rax" : : : "rax");
> --
> 2.26.2
>
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] selftests: kvm: Use a shorter encoding to clear RAX
2020-08-17 17:20 [PATCH] selftests: kvm: Use a shorter encoding to clear RAX Paolo Bonzini
2020-08-17 17:35 ` Sean Christopherson
@ 2020-08-18 13:21 ` Yang Weijiang
1 sibling, 0 replies; 3+ messages in thread
From: Yang Weijiang @ 2020-08-18 13:21 UTC (permalink / raw)
To: Paolo Bonzini
Cc: linux-kernel, kvm, Sean Christopherson, peterx, Yang Weijiang, stable
On Mon, Aug 17, 2020 at 01:20:34PM -0400, Paolo Bonzini wrote:
> From: Yang Weijiang <weijiang.yang@intel.com>
>
> If debug_regs.c is built with newer binutils, the resulting binary is "optimized"
> by the assembler:
>
> asm volatile("ss_start: "
> "xor %%rax,%%rax\n\t"
> "cpuid\n\t"
> "movl $0x1a0,%%ecx\n\t"
> "rdmsr\n\t"
> : : : "rax", "ecx");
>
> is translated to :
>
> 000000000040194e <ss_start>:
> 40194e: 31 c0 xor %eax,%eax <----- rax->eax?
> 401950: 0f a2 cpuid
> 401952: b9 a0 01 00 00 mov $0x1a0,%ecx
> 401957: 0f 32 rdmsr
>
> As you can see rax is replaced with eax in target binary code.
> This causes a difference is the length of xor instruction (2 Byte vs 3 Byte),
> and makes the hard-coded instruction length check fail:
>
> /* Instruction lengths starting at ss_start */
> int ss_size[4] = {
> 3, /* xor */ <-------- 2 or 3?
> 2, /* cpuid */
> 5, /* mov */
> 2, /* rdmsr */
> };
>
> Encode the shorter version directly and, while at it, fix the "clobbers"
> of the asm.
>
> Reported-by: Yang Weijiang <weijiang.yang@intel.com>
> Cc: stable@vger.kernel.org
> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
> ---
> tools/testing/selftests/kvm/x86_64/debug_regs.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/tools/testing/selftests/kvm/x86_64/debug_regs.c b/tools/testing/selftests/kvm/x86_64/debug_regs.c
> index 8162c58a1234..b8d14f9db5f9 100644
> --- a/tools/testing/selftests/kvm/x86_64/debug_regs.c
> +++ b/tools/testing/selftests/kvm/x86_64/debug_regs.c
> @@ -40,11 +40,11 @@ static void guest_code(void)
>
> /* Single step test, covers 2 basic instructions and 2 emulated */
> asm volatile("ss_start: "
> - "xor %%rax,%%rax\n\t"
> + "xor %%eax,%%eax\n\t"
> "cpuid\n\t"
> "movl $0x1a0,%%ecx\n\t"
> "rdmsr\n\t"
> - : : : "rax", "ecx");
> + : : : "eax", "ebx", "ecx", "edx");
>
Hi, Paolo,
Should we also change the below expected instruction length(xor) to 2 in
accordance with above change?
int ss_size[4] = {
3, /* xor */
2, /* cpuid */
5, /* mov */
2, /* rdmsr */
> /* DR6.BD test */
> asm volatile("bd_start: mov %%dr0, %%rax" : : : "rax");
> --
> 2.26.2
^ permalink raw reply [flat|nested] 3+ messages in thread
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