From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E14F5C433DF for ; Fri, 21 Aug 2020 03:46:13 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id BCD6620758 for ; Fri, 21 Aug 2020 03:46:13 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="WQzGeRlb" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727987AbgHUDqM (ORCPT ); Thu, 20 Aug 2020 23:46:12 -0400 Received: from mail29.static.mailgun.info ([104.130.122.29]:58948 "EHLO mail29.static.mailgun.info" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727116AbgHUDqG (ORCPT ); Thu, 20 Aug 2020 23:46:06 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1597981566; h=Content-Transfer-Encoding: MIME-Version: References: In-Reply-To: Message-Id: Date: Subject: Cc: To: From: Sender; bh=MZNhX62GC5mduYw1hv3vNaxsR+pcnDEzoaKSap/G7+w=; b=WQzGeRlboP+aaImlfdEHuH+6K7NYorRu49+0GZX43L7DIdazfEfLUAeKOHMFMvJ8nkNw2vMr sD03QPBwa+OdUu47xgVSueoFr41ew66CLzVX8LJR0cqsCImKUpw1q+CQLYYTweJH9VDg6pQI 9hgH6vD1Spzf1toFdaKEiqkC08w= X-Mailgun-Sending-Ip: 104.130.122.29 X-Mailgun-Sid: WyI0MWYwYSIsICJsaW51eC1rZXJuZWxAdmdlci5rZXJuZWwub3JnIiwgImJlOWU0YSJd Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n06.prod.us-west-2.postgun.com with SMTP id 5f3f4355b9730f4536cc6c43 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Fri, 21 Aug 2020 03:45:25 GMT Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 9873EC433CB; Fri, 21 Aug 2020 03:45:25 +0000 (UTC) Received: from tingweiz-gv.qualcomm.com (unknown [180.166.53.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: tingwei) by smtp.codeaurora.org (Postfix) with ESMTPSA id 9F739C433B1; Fri, 21 Aug 2020 03:45:19 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 9F739C433B1 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=none smtp.mailfrom=tingwei@codeaurora.org From: Tingwei Zhang To: Mathieu Poirier , Suzuki K Poulose , Alexander Shishkin , Mike Leach Cc: Tingwei Zhang , Greg Kroah-Hartman , Leo Yan , Randy Dunlap , Russell King , Kim Phillips , Mian Yousaf Kaukab , tsoni@codeaurora.org, Sai Prakash Ranjan , Mao Jinlong , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v10 04/24] coresight: add coresight prefix to barrier_pkt Date: Fri, 21 Aug 2020 11:44:25 +0800 Message-Id: <20200821034445.967-5-tingwei@codeaurora.org> X-Mailer: git-send-email 2.20.0 In-Reply-To: <20200821034445.967-1-tingwei@codeaurora.org> References: <20200821034445.967-1-tingwei@codeaurora.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add coresight prefix to make it specific. It will be a export symbol. Signed-off-by: Mian Yousaf Kaukab Signed-off-by: Tingwei Zhang Reviewed-by: Suzuki K Poulose Reviewed-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-etb10.c | 2 +- drivers/hwtracing/coresight/coresight-priv.h | 8 ++++---- drivers/hwtracing/coresight/coresight-tmc-etf.c | 2 +- drivers/hwtracing/coresight/coresight.c | 2 +- 4 files changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-etb10.c b/drivers/hwtracing/coresight/coresight-etb10.c index 03e3f2590191..04ee9cda988d 100644 --- a/drivers/hwtracing/coresight/coresight-etb10.c +++ b/drivers/hwtracing/coresight/coresight-etb10.c @@ -525,7 +525,7 @@ static unsigned long etb_update_buffer(struct coresight_device *csdev, cur = buf->cur; offset = buf->offset; - barrier = barrier_pkt; + barrier = coresight_barrier_pkt; for (i = 0; i < to_read; i += 4) { buf_ptr = buf->data_pages[cur] + offset; diff --git a/drivers/hwtracing/coresight/coresight-priv.h b/drivers/hwtracing/coresight/coresight-priv.h index d801a2755432..dcb8aeb6af62 100644 --- a/drivers/hwtracing/coresight/coresight-priv.h +++ b/drivers/hwtracing/coresight/coresight-priv.h @@ -66,8 +66,8 @@ static DEVICE_ATTR_RO(name) #define coresight_simple_reg64(type, name, lo_off, hi_off) \ __coresight_simple_func(type, NULL, name, lo_off, hi_off) -extern const u32 barrier_pkt[4]; -#define CORESIGHT_BARRIER_PKT_SIZE (sizeof(barrier_pkt)) +extern const u32 coresight_barrier_pkt[4]; +#define CORESIGHT_BARRIER_PKT_SIZE (sizeof(coresight_barrier_pkt)) enum etm_addr_type { ETM_ADDR_TYPE_NONE, @@ -104,10 +104,10 @@ struct cs_buffers { static inline void coresight_insert_barrier_packet(void *buf) { if (buf) - memcpy(buf, barrier_pkt, CORESIGHT_BARRIER_PKT_SIZE); + memcpy(buf, coresight_barrier_pkt, + CORESIGHT_BARRIER_PKT_SIZE); } - static inline void CS_LOCK(void __iomem *addr) { do { diff --git a/drivers/hwtracing/coresight/coresight-tmc-etf.c b/drivers/hwtracing/coresight/coresight-tmc-etf.c index 6375504ba8b0..44402d413ebb 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etf.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etf.c @@ -519,7 +519,7 @@ static unsigned long tmc_update_etf_buffer(struct coresight_device *csdev, cur = buf->cur; offset = buf->offset; - barrier = barrier_pkt; + barrier = coresight_barrier_pkt; /* for every byte to read */ for (i = 0; i < to_read; i += 4) { diff --git a/drivers/hwtracing/coresight/coresight.c b/drivers/hwtracing/coresight/coresight.c index e9c90f2de34a..d515088cc47d 100644 --- a/drivers/hwtracing/coresight/coresight.c +++ b/drivers/hwtracing/coresight/coresight.c @@ -53,7 +53,7 @@ static struct list_head *stm_path; * beginning of the data collected in a buffer. That way the decoder knows that * it needs to look for another sync sequence. */ -const u32 barrier_pkt[4] = {0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff}; +const u32 coresight_barrier_pkt[4] = {0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff}; static int coresight_id_match(struct device *dev, void *data) { -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project