From: Joerg Roedel <joro@8bytes.org>
To: x86@kernel.org
Cc: Joerg Roedel <joro@8bytes.org>, Joerg Roedel <jroedel@suse.de>,
hpa@zytor.com, Andy Lutomirski <luto@kernel.org>,
Dave Hansen <dave.hansen@linux.intel.com>,
Peter Zijlstra <peterz@infradead.org>,
Jiri Slaby <jslaby@suse.cz>,
Dan Williams <dan.j.williams@intel.com>,
Tom Lendacky <thomas.lendacky@amd.com>,
Juergen Gross <jgross@suse.com>,
Kees Cook <keescook@chromium.org>,
David Rientjes <rientjes@google.com>,
Cfir Cohen <cfir@google.com>, Erdem Aktas <erdemaktas@google.com>,
Masami Hiramatsu <mhiramat@kernel.org>,
Mike Stunes <mstunes@vmware.com>,
Sean Christopherson <sean.j.christopherson@intel.com>,
Martin Radev <martin.b.radev@gmail.com>,
linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
virtualization@lists.linux-foundation.org
Subject: [PATCH v6 45/76] x86/sev-es: Allocate and Map IST stack for #VC handler
Date: Mon, 24 Aug 2020 10:54:40 +0200 [thread overview]
Message-ID: <20200824085511.7553-46-joro@8bytes.org> (raw)
In-Reply-To: <20200824085511.7553-1-joro@8bytes.org>
From: Joerg Roedel <jroedel@suse.de>
Allocate and map an IST stack and an additional fall-back stack for
the #VC handler. The memory for the stacks is allocated only when
SEV-ES is active.
The #VC handler needs to use an IST stack because it could be raised
from kernel space with unsafe stack, e.g. in the SYSCALL entry path.
Since the #VC exception can be nested, the #VC handler switches back to
the interrupted stack when entered from kernel space. If switching back
is not possible the fall-back stack is used.
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Link: https://lore.kernel.org/r/20200724160336.5435-45-joro@8bytes.org
---
arch/x86/include/asm/cpu_entry_area.h | 33 +++++++++++++++++----------
arch/x86/include/asm/page_64_types.h | 1 +
arch/x86/kernel/cpu/common.c | 2 ++
arch/x86/kernel/dumpstack_64.c | 8 +++++--
arch/x86/kernel/sev-es.c | 33 +++++++++++++++++++++++++++
5 files changed, 63 insertions(+), 14 deletions(-)
diff --git a/arch/x86/include/asm/cpu_entry_area.h b/arch/x86/include/asm/cpu_entry_area.h
index 8902fdb7de13..f87e4c0c16f4 100644
--- a/arch/x86/include/asm/cpu_entry_area.h
+++ b/arch/x86/include/asm/cpu_entry_area.h
@@ -11,25 +11,29 @@
#ifdef CONFIG_X86_64
/* Macro to enforce the same ordering and stack sizes */
-#define ESTACKS_MEMBERS(guardsize) \
- char DF_stack_guard[guardsize]; \
- char DF_stack[EXCEPTION_STKSZ]; \
- char NMI_stack_guard[guardsize]; \
- char NMI_stack[EXCEPTION_STKSZ]; \
- char DB_stack_guard[guardsize]; \
- char DB_stack[EXCEPTION_STKSZ]; \
- char MCE_stack_guard[guardsize]; \
- char MCE_stack[EXCEPTION_STKSZ]; \
- char IST_top_guard[guardsize]; \
+#define ESTACKS_MEMBERS(guardsize, optional_stack_size) \
+ char DF_stack_guard[guardsize]; \
+ char DF_stack[EXCEPTION_STKSZ]; \
+ char NMI_stack_guard[guardsize]; \
+ char NMI_stack[EXCEPTION_STKSZ]; \
+ char DB_stack_guard[guardsize]; \
+ char DB_stack[EXCEPTION_STKSZ]; \
+ char MCE_stack_guard[guardsize]; \
+ char MCE_stack[EXCEPTION_STKSZ]; \
+ char VC_stack_guard[guardsize]; \
+ char VC_stack[optional_stack_size]; \
+ char VC2_stack_guard[guardsize]; \
+ char VC2_stack[optional_stack_size]; \
+ char IST_top_guard[guardsize]; \
/* The exception stacks' physical storage. No guard pages required */
struct exception_stacks {
- ESTACKS_MEMBERS(0)
+ ESTACKS_MEMBERS(0, 0)
};
/* The effective cpu entry area mapping with guard pages. */
struct cea_exception_stacks {
- ESTACKS_MEMBERS(PAGE_SIZE)
+ ESTACKS_MEMBERS(PAGE_SIZE, EXCEPTION_STKSZ)
};
/*
@@ -40,6 +44,8 @@ enum exception_stack_ordering {
ESTACK_NMI,
ESTACK_DB,
ESTACK_MCE,
+ ESTACK_VC,
+ ESTACK_VC2,
N_EXCEPTION_STACKS
};
@@ -139,4 +145,7 @@ static inline struct entry_stack *cpu_entry_stack(int cpu)
#define __this_cpu_ist_top_va(name) \
CEA_ESTACK_TOP(__this_cpu_read(cea_exception_stacks), name)
+#define __this_cpu_ist_bot_va(name) \
+ CEA_ESTACK_BOT(__this_cpu_read(cea_exception_stacks), name)
+
#endif
diff --git a/arch/x86/include/asm/page_64_types.h b/arch/x86/include/asm/page_64_types.h
index 288b065955b7..d0c6c10c18a0 100644
--- a/arch/x86/include/asm/page_64_types.h
+++ b/arch/x86/include/asm/page_64_types.h
@@ -28,6 +28,7 @@
#define IST_INDEX_NMI 1
#define IST_INDEX_DB 2
#define IST_INDEX_MCE 3
+#define IST_INDEX_VC 4
/*
* Set __PAGE_OFFSET to the most negative possible address +
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 8aa20bc2f1ca..1d65365363a1 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1821,6 +1821,8 @@ static inline void tss_setup_ist(struct tss_struct *tss)
tss->x86_tss.ist[IST_INDEX_NMI] = __this_cpu_ist_top_va(NMI);
tss->x86_tss.ist[IST_INDEX_DB] = __this_cpu_ist_top_va(DB);
tss->x86_tss.ist[IST_INDEX_MCE] = __this_cpu_ist_top_va(MCE);
+ /* Only mapped when SEV-ES is active */
+ tss->x86_tss.ist[IST_INDEX_VC] = __this_cpu_ist_top_va(VC);
}
#else /* CONFIG_X86_64 */
diff --git a/arch/x86/kernel/dumpstack_64.c b/arch/x86/kernel/dumpstack_64.c
index 4a94d38cd141..c49cf594714b 100644
--- a/arch/x86/kernel/dumpstack_64.c
+++ b/arch/x86/kernel/dumpstack_64.c
@@ -24,11 +24,13 @@ static const char * const exception_stack_names[] = {
[ ESTACK_NMI ] = "NMI",
[ ESTACK_DB ] = "#DB",
[ ESTACK_MCE ] = "#MC",
+ [ ESTACK_VC ] = "#VC",
+ [ ESTACK_VC2 ] = "#VC2",
};
const char *stack_type_name(enum stack_type type)
{
- BUILD_BUG_ON(N_EXCEPTION_STACKS != 4);
+ BUILD_BUG_ON(N_EXCEPTION_STACKS != 6);
if (type == STACK_TYPE_IRQ)
return "IRQ";
@@ -79,6 +81,8 @@ struct estack_pages estack_pages[CEA_ESTACK_PAGES] ____cacheline_aligned = {
EPAGERANGE(NMI),
EPAGERANGE(DB),
EPAGERANGE(MCE),
+ EPAGERANGE(VC),
+ EPAGERANGE(VC2),
};
static bool in_exception_stack(unsigned long *stack, struct stack_info *info)
@@ -88,7 +92,7 @@ static bool in_exception_stack(unsigned long *stack, struct stack_info *info)
struct pt_regs *regs;
unsigned int k;
- BUILD_BUG_ON(N_EXCEPTION_STACKS != 4);
+ BUILD_BUG_ON(N_EXCEPTION_STACKS != 6);
begin = (unsigned long)__this_cpu_read(cea_exception_stacks);
/*
diff --git a/arch/x86/kernel/sev-es.c b/arch/x86/kernel/sev-es.c
index 734afaee378d..64002d86a237 100644
--- a/arch/x86/kernel/sev-es.c
+++ b/arch/x86/kernel/sev-es.c
@@ -17,6 +17,7 @@
#include <linux/kernel.h>
#include <linux/mm.h>
+#include <asm/cpu_entry_area.h>
#include <asm/sev-es.h>
#include <asm/insn-eval.h>
#include <asm/fpu/internal.h>
@@ -37,10 +38,41 @@ static struct ghcb __initdata *boot_ghcb;
/* #VC handler runtime per-cpu data */
struct sev_es_runtime_data {
struct ghcb ghcb_page;
+
+ /* Physical storage for the per-cpu IST stack of the #VC handler */
+ char ist_stack[EXCEPTION_STKSZ] __aligned(PAGE_SIZE);
+
+ /*
+ * Physical storage for the per-cpu fall-back stack of the #VC handler.
+ * The fall-back stack is used when it is not safe to switch back to the
+ * interrupted stack in the #VC entry code.
+ */
+ char fallback_stack[EXCEPTION_STKSZ] __aligned(PAGE_SIZE);
};
static DEFINE_PER_CPU(struct sev_es_runtime_data*, runtime_data);
+static void __init sev_es_setup_vc_stacks(int cpu)
+{
+ struct sev_es_runtime_data *data;
+ struct cpu_entry_area *cea;
+ unsigned long vaddr;
+ phys_addr_t pa;
+
+ data = per_cpu(runtime_data, cpu);
+ cea = get_cpu_entry_area(cpu);
+
+ /* Map #VC IST stack */
+ vaddr = CEA_ESTACK_BOT(&cea->estacks, VC);
+ pa = __pa(data->ist_stack);
+ cea_set_pte((void *)vaddr, pa, PAGE_KERNEL);
+
+ /* Map VC fall-back stack */
+ vaddr = CEA_ESTACK_BOT(&cea->estacks, VC2);
+ pa = __pa(data->fallback_stack);
+ cea_set_pte((void *)vaddr, pa, PAGE_KERNEL);
+}
+
/* Needed in vc_early_forward_exception */
void do_early_exception(struct pt_regs *regs, int trapnr);
@@ -249,6 +281,7 @@ void __init sev_es_init_vc_handling(void)
for_each_possible_cpu(cpu) {
sev_es_alloc_runtime_data(cpu);
sev_es_init_ghcb(cpu);
+ sev_es_setup_vc_stacks(cpu);
}
}
--
2.28.0
next prev parent reply other threads:[~2020-08-24 9:11 UTC|newest]
Thread overview: 116+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-24 8:53 [PATCH v6 00/76] x86: SEV-ES Guest Support Joerg Roedel
2020-08-24 8:53 ` [PATCH v6 01/76] KVM: SVM: nested: Don't allocate VMCB structures on stack Joerg Roedel
2020-08-24 8:53 ` [PATCH v6 02/76] KVM: SVM: Add GHCB definitions Joerg Roedel
2020-08-24 10:44 ` Borislav Petkov
2020-08-25 9:22 ` Joerg Roedel
2020-08-25 11:04 ` Borislav Petkov
2020-08-27 16:01 ` Arvind Sankar
2020-08-28 11:54 ` Joerg Roedel
2020-08-24 8:53 ` [PATCH v6 03/76] KVM: SVM: Add GHCB Accessor functions Joerg Roedel
2020-08-24 8:53 ` [PATCH v6 04/76] KVM: SVM: Use __packed shorthand Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 05/76] x86/cpufeatures: Add SEV-ES CPU feature Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 06/76] x86/traps: Move pf error codes to <asm/trap_pf.h> Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 07/76] x86/insn: Make inat-tables.c suitable for pre-decompression code Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 08/76] x86/umip: Factor out instruction fetch Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 09/76] x86/umip: Factor out instruction decoding Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 10/76] x86/insn: Add insn_get_modrm_reg_off() Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 11/76] x86/insn: Add insn_has_rep_prefix() helper Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 12/76] x86/boot/compressed/64: Disable red-zone usage Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 13/76] x86/boot/compressed/64: Add IDT Infrastructure Joerg Roedel
2020-08-27 15:26 ` Arvind Sankar
2020-08-28 12:12 ` Joerg Roedel
2020-08-28 15:09 ` Arvind Sankar
2020-08-24 8:54 ` [PATCH v6 14/76] x86/boot/compressed/64: Rename kaslr_64.c to ident_map_64.c Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 15/76] x86/boot/compressed/64: Add page-fault handler Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 16/76] x86/boot/compressed/64: Always switch to own page-table Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 17/76] x86/boot/compressed/64: Don't pre-map memory in KASLR code Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 18/76] x86/boot/compressed/64: Change add_identity_map() to take start and end Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 19/76] x86/boot/compressed/64: Add stage1 #VC handler Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 20/76] x86/boot/compressed/64: Call set_sev_encryption_mask earlier Joerg Roedel
2020-08-27 9:36 ` Borislav Petkov
2020-08-24 8:54 ` [PATCH v6 21/76] x86/boot/compressed/64: Check return value of kernel_ident_mapping_init() Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 22/76] x86/boot/compressed/64: Add set_page_en/decrypted() helpers Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 23/76] x86/boot/compressed/64: Setup GHCB Based VC Exception handler Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 24/76] x86/boot/compressed/64: Unmap GHCB page before booting the kernel Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 25/76] x86/sev-es: Add support for handling IOIO exceptions Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 26/76] x86/fpu: Move xgetbv()/xsetbv() into separate header Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 27/76] x86/sev-es: Add CPUID handling to #VC handler Joerg Roedel
2020-08-27 22:48 ` Arvind Sankar
2020-08-28 12:33 ` Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 28/76] x86/idt: Move IDT to data segment Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 29/76] x86/idt: Split idt_data setup out of set_intr_gate() Joerg Roedel
2020-08-28 15:16 ` Borislav Petkov
2020-08-24 8:54 ` [PATCH v6 30/76] x86/head/64: Install startup GDT Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 31/76] x86/head/64: Setup MSR_GS_BASE before calling into C code Joerg Roedel
2020-08-28 18:13 ` Borislav Petkov
2020-09-01 12:09 ` Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 32/76] x86/head/64: Load GDT after switch to virtual addresses Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 33/76] x86/head/64: Load segment registers earlier Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 34/76] x86/head/64: Switch to initial stack earlier Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 35/76] x86/head/64: Make fixup_pointer() static inline Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 36/76] x86/head/64: Load IDT earlier Joerg Roedel
2020-08-29 10:24 ` Borislav Petkov
2020-09-01 12:13 ` Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 37/76] x86/head/64: Move early exception dispatch to C code Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 38/76] x86/head/64: Set CR4.FSGSBASE early Joerg Roedel
2020-08-29 15:55 ` Borislav Petkov
2020-08-31 8:58 ` Joerg Roedel
2020-08-31 9:26 ` Borislav Petkov
2020-08-24 8:54 ` [PATCH v6 39/76] x86/sev-es: Add SEV-ES Feature Detection Joerg Roedel
2020-08-29 16:25 ` Borislav Petkov
2020-08-24 8:54 ` [PATCH v6 40/76] x86/sev-es: Print SEV-ES info into kernel log Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 41/76] x86/sev-es: Compile early handler code into kernel image Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 42/76] x86/sev-es: Setup early #VC handler Joerg Roedel
2020-08-31 9:45 ` Borislav Petkov
2020-09-01 12:59 ` Joerg Roedel
2020-09-01 13:35 ` Borislav Petkov
2021-09-04 9:39 ` Lai Jiangshan
2021-09-06 5:07 ` Juergen Gross
2020-08-24 8:54 ` [PATCH v6 43/76] x86/sev-es: Setup GHCB based boot " Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 44/76] x86/sev-es: Setup per-cpu GHCBs for the runtime handler Joerg Roedel
2020-08-24 8:54 ` Joerg Roedel [this message]
2020-08-31 10:27 ` [PATCH v6 45/76] x86/sev-es: Allocate and Map IST stack for #VC handler Borislav Petkov
2020-08-24 8:54 ` [PATCH v6 46/76] x86/sev-es: Adjust #VC IST Stack on entering NMI handler Joerg Roedel
2020-08-31 11:05 ` Borislav Petkov
2020-08-24 8:54 ` [PATCH v6 47/76] x86/dumpstack/64: Add noinstr version of get_stack_info() Joerg Roedel
2020-08-31 11:11 ` Borislav Petkov
2020-08-24 8:54 ` [PATCH v6 48/76] x86/entry/64: Add entry code for #VC handler Joerg Roedel
2020-08-31 11:30 ` Borislav Petkov
2020-09-01 13:29 ` Joerg Roedel
2020-08-31 17:30 ` Borislav Petkov
2020-08-24 8:54 ` [PATCH v6 49/76] x86/sev-es: Add Runtime #VC Exception Handler Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 50/76] x86/sev-es: Wire up existing #VC exit-code handlers Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 51/76] x86/sev-es: Handle instruction fetches from user-space Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 52/76] x86/sev-es: Handle MMIO events Joerg Roedel
2020-08-31 15:47 ` Borislav Petkov
2020-08-24 8:54 ` [PATCH v6 53/76] x86/sev-es: Handle MMIO String Instructions Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 54/76] x86/sev-es: Handle MSR events Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 55/76] x86/sev-es: Handle DR7 read/write events Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 56/76] x86/sev-es: Handle WBINVD Events Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 57/76] x86/sev-es: Handle RDTSC(P) Events Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 58/76] x86/sev-es: Handle RDPMC Events Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 59/76] x86/sev-es: Handle INVD Events Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 60/76] x86/sev-es: Handle MONITOR/MONITORX Events Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 61/76] x86/sev-es: Handle MWAIT/MWAITX Events Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 62/76] x86/sev-es: Handle VMMCALL Events Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 63/76] x86/sev-es: Handle #AC Events Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 64/76] x86/sev-es: Handle #DB Events Joerg Roedel
2020-08-31 16:19 ` Borislav Petkov
2020-08-24 8:55 ` [PATCH v6 65/76] x86/paravirt: Allow hypervisor specific VMMCALL handling under SEV-ES Joerg Roedel
2020-08-24 8:55 ` [PATCH v6 66/76] x86/kvm: Add KVM " Joerg Roedel
2020-08-24 8:55 ` [PATCH v6 67/76] x86/vmware: Add VMware specific handling for VMMCALL " Joerg Roedel
2020-08-24 8:55 ` [PATCH v6 68/76] x86/realmode: Add SEV-ES specific trampoline entry point Joerg Roedel
2020-08-24 8:55 ` [PATCH v6 69/76] x86/realmode: Setup AP jump table Joerg Roedel
2020-08-31 17:09 ` Borislav Petkov
2020-09-01 13:55 ` Joerg Roedel
2020-08-24 8:55 ` [PATCH v6 70/76] x86/smpboot: Setup TSS for starting AP Joerg Roedel
2020-08-31 17:25 ` Borislav Petkov
2020-08-24 8:55 ` [PATCH v6 71/76] x86/head/64: Don't call verify_cpu() on starting APs Joerg Roedel
2020-08-24 8:55 ` [PATCH v6 72/76] x86/head/64: Rename start_cpu0 Joerg Roedel
2020-08-31 17:29 ` Borislav Petkov
2020-08-24 8:55 ` [PATCH v6 73/76] x86/sev-es: Support CPU offline/online Joerg Roedel
2020-08-24 8:55 ` [PATCH v6 74/76] x86/sev-es: Handle NMI State Joerg Roedel
2020-08-24 8:55 ` [PATCH v6 75/76] x86/efi: Add GHCB mappings when SEV-ES is active Joerg Roedel
2020-08-24 8:55 ` [PATCH v6 76/76] x86/sev-es: Check required CPU features for SEV-ES Joerg Roedel
2020-08-25 0:21 ` [PATCH v6 00/76] x86: SEV-ES Guest Support Mike Stunes
2020-08-25 6:24 ` Joerg Roedel
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