From: Joerg Roedel <joro@8bytes.org>
To: x86@kernel.org
Cc: Joerg Roedel <joro@8bytes.org>, Joerg Roedel <jroedel@suse.de>,
hpa@zytor.com, Andy Lutomirski <luto@kernel.org>,
Dave Hansen <dave.hansen@linux.intel.com>,
Peter Zijlstra <peterz@infradead.org>,
Jiri Slaby <jslaby@suse.cz>,
Dan Williams <dan.j.williams@intel.com>,
Tom Lendacky <thomas.lendacky@amd.com>,
Juergen Gross <jgross@suse.com>,
Kees Cook <keescook@chromium.org>,
David Rientjes <rientjes@google.com>,
Cfir Cohen <cfir@google.com>, Erdem Aktas <erdemaktas@google.com>,
Masami Hiramatsu <mhiramat@kernel.org>,
Mike Stunes <mstunes@vmware.com>,
Sean Christopherson <sean.j.christopherson@intel.com>,
Martin Radev <martin.b.radev@gmail.com>,
linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
virtualization@lists.linux-foundation.org
Subject: [PATCH v6 46/76] x86/sev-es: Adjust #VC IST Stack on entering NMI handler
Date: Mon, 24 Aug 2020 10:54:41 +0200 [thread overview]
Message-ID: <20200824085511.7553-47-joro@8bytes.org> (raw)
In-Reply-To: <20200824085511.7553-1-joro@8bytes.org>
From: Joerg Roedel <jroedel@suse.de>
When an NMI hits in the #VC handler entry code before it switched to
another stack, any subsequent #VC exception in the NMI code-path will
overwrite the interrupted #VC handlers stack.
Make sure this doesn't happen by explicitly adjusting the #VC IST entry
in the NMI handler for the time in can cause #VC exceptions.
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Link: https://lore.kernel.org/r/20200724160336.5435-46-joro@8bytes.org
---
arch/x86/include/asm/sev-es.h | 19 +++++++++++
arch/x86/kernel/nmi.c | 6 ++++
arch/x86/kernel/sev-es.c | 59 +++++++++++++++++++++++++++++++++++
arch/x86/kernel/traps.c | 2 ++
4 files changed, 86 insertions(+)
diff --git a/arch/x86/include/asm/sev-es.h b/arch/x86/include/asm/sev-es.h
index 824e9e6b067c..2dd19932a60d 100644
--- a/arch/x86/include/asm/sev-es.h
+++ b/arch/x86/include/asm/sev-es.h
@@ -77,4 +77,23 @@ static inline u64 lower_bits(u64 val, unsigned int bits)
extern void vc_no_ghcb(void);
extern bool handle_vc_boot_ghcb(struct pt_regs *regs);
+#ifdef CONFIG_AMD_MEM_ENCRYPT
+extern struct static_key_false sev_es_enable_key;
+extern void __sev_es_ist_enter(struct pt_regs *regs);
+extern void __sev_es_ist_exit(void);
+static __always_inline void sev_es_ist_enter(struct pt_regs *regs)
+{
+ if (static_branch_unlikely(&sev_es_enable_key))
+ __sev_es_ist_enter(regs);
+}
+static __always_inline void sev_es_ist_exit(void)
+{
+ if (static_branch_unlikely(&sev_es_enable_key))
+ __sev_es_ist_exit();
+}
+#else
+static inline void sev_es_ist_enter(struct pt_regs *regs) { }
+static inline void sev_es_ist_exit(void) { }
+#endif
+
#endif
diff --git a/arch/x86/kernel/nmi.c b/arch/x86/kernel/nmi.c
index 4fc9954a9560..951f098a4bf5 100644
--- a/arch/x86/kernel/nmi.c
+++ b/arch/x86/kernel/nmi.c
@@ -33,6 +33,7 @@
#include <asm/reboot.h>
#include <asm/cache.h>
#include <asm/nospec-branch.h>
+#include <asm/sev-es.h>
#define CREATE_TRACE_POINTS
#include <trace/events/nmi.h>
@@ -488,6 +489,9 @@ DEFINE_IDTENTRY_RAW(exc_nmi)
this_cpu_write(nmi_cr2, read_cr2());
nmi_restart:
+ /* Needs to happen before DR7 is accessed */
+ sev_es_ist_enter(regs);
+
this_cpu_write(nmi_dr7, local_db_save());
irq_state = idtentry_enter_nmi(regs);
@@ -501,6 +505,8 @@ DEFINE_IDTENTRY_RAW(exc_nmi)
local_db_restore(this_cpu_read(nmi_dr7));
+ sev_es_ist_exit();
+
if (unlikely(this_cpu_read(nmi_cr2) != read_cr2()))
write_cr2(this_cpu_read(nmi_cr2));
if (this_cpu_dec_return(nmi_state))
diff --git a/arch/x86/kernel/sev-es.c b/arch/x86/kernel/sev-es.c
index 64002d86a237..95831d103418 100644
--- a/arch/x86/kernel/sev-es.c
+++ b/arch/x86/kernel/sev-es.c
@@ -52,6 +52,9 @@ struct sev_es_runtime_data {
static DEFINE_PER_CPU(struct sev_es_runtime_data*, runtime_data);
+DEFINE_STATIC_KEY_FALSE(sev_es_enable_key);
+EXPORT_SYMBOL_GPL(sev_es_enable_key);
+
static void __init sev_es_setup_vc_stacks(int cpu)
{
struct sev_es_runtime_data *data;
@@ -73,6 +76,59 @@ static void __init sev_es_setup_vc_stacks(int cpu)
cea_set_pte((void *)vaddr, pa, PAGE_KERNEL);
}
+static __always_inline bool on_vc_stack(unsigned long sp)
+{
+ return ((sp >= __this_cpu_ist_bot_va(VC)) && (sp < __this_cpu_ist_top_va(VC)));
+}
+
+/*
+ * This function handles the case when an NM is raised in the #VC exception
+ * handler entry code. In this case the IST entry for VC must be adjusted, so
+ * that any subsequent VC exception will not overwrite the stack contents of the
+ * interrupted VC handler.
+ *
+ * The IST entry is adjusted unconditionally so that it can be also be
+ * unconditionally back-adjusted in sev_es_ist_exit(). Otherwise a nested
+ * sev_es_ist_exit() call may back-adjust the IST entry too early.
+ */
+void noinstr __sev_es_ist_enter(struct pt_regs *regs)
+{
+ unsigned long old_ist, new_ist;
+ unsigned long *p;
+
+ /* Read old IST entry */
+ old_ist = __this_cpu_read(cpu_tss_rw.x86_tss.ist[IST_INDEX_VC]);
+
+ /* Make room on the IST stack */
+ if (on_vc_stack(regs->sp))
+ new_ist = ALIGN_DOWN(regs->sp, 8) - sizeof(old_ist);
+ else
+ new_ist = old_ist - sizeof(old_ist);
+
+ /* Store old IST entry */
+ p = (unsigned long *)new_ist;
+ *p = old_ist;
+
+ /* Set new IST entry */
+ this_cpu_write(cpu_tss_rw.x86_tss.ist[IST_INDEX_VC], new_ist);
+}
+
+void noinstr __sev_es_ist_exit(void)
+{
+ unsigned long ist;
+ unsigned long *p;
+
+ /* Read IST entry */
+ ist = __this_cpu_read(cpu_tss_rw.x86_tss.ist[IST_INDEX_VC]);
+
+ if (WARN_ON(ist == __this_cpu_ist_top_va(VC)))
+ return;
+
+ /* Read back old IST entry and write it to the TSS */
+ p = (unsigned long *)ist;
+ this_cpu_write(cpu_tss_rw.x86_tss.ist[IST_INDEX_VC], *p);
+}
+
/* Needed in vc_early_forward_exception */
void do_early_exception(struct pt_regs *regs, int trapnr);
@@ -277,6 +333,9 @@ void __init sev_es_init_vc_handling(void)
if (!sev_es_active())
return;
+ /* Enable SEV-ES special handling */
+ static_branch_enable(&sev_es_enable_key);
+
/* Initialize per-cpu GHCB pages */
for_each_possible_cpu(cpu) {
sev_es_alloc_runtime_data(cpu);
diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c
index 74cfe6eb7ebb..030d882eaad1 100644
--- a/arch/x86/kernel/traps.c
+++ b/arch/x86/kernel/traps.c
@@ -59,6 +59,7 @@
#include <asm/umip.h>
#include <asm/insn.h>
#include <asm/insn-eval.h>
+#include <asm/sev-es.h>
#ifdef CONFIG_X86_64
#include <asm/x86_init.h>
@@ -731,6 +732,7 @@ static bool is_sysenter_singlestep(struct pt_regs *regs)
static __always_inline void debug_enter(unsigned long *dr6, unsigned long *dr7)
{
+
/*
* Disable breakpoints during exception handling; recursive exceptions
* are exceedingly 'fun'.
--
2.28.0
next prev parent reply other threads:[~2020-08-24 9:08 UTC|newest]
Thread overview: 116+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-24 8:53 [PATCH v6 00/76] x86: SEV-ES Guest Support Joerg Roedel
2020-08-24 8:53 ` [PATCH v6 01/76] KVM: SVM: nested: Don't allocate VMCB structures on stack Joerg Roedel
2020-08-24 8:53 ` [PATCH v6 02/76] KVM: SVM: Add GHCB definitions Joerg Roedel
2020-08-24 10:44 ` Borislav Petkov
2020-08-25 9:22 ` Joerg Roedel
2020-08-25 11:04 ` Borislav Petkov
2020-08-27 16:01 ` Arvind Sankar
2020-08-28 11:54 ` Joerg Roedel
2020-08-24 8:53 ` [PATCH v6 03/76] KVM: SVM: Add GHCB Accessor functions Joerg Roedel
2020-08-24 8:53 ` [PATCH v6 04/76] KVM: SVM: Use __packed shorthand Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 05/76] x86/cpufeatures: Add SEV-ES CPU feature Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 06/76] x86/traps: Move pf error codes to <asm/trap_pf.h> Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 07/76] x86/insn: Make inat-tables.c suitable for pre-decompression code Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 08/76] x86/umip: Factor out instruction fetch Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 09/76] x86/umip: Factor out instruction decoding Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 10/76] x86/insn: Add insn_get_modrm_reg_off() Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 11/76] x86/insn: Add insn_has_rep_prefix() helper Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 12/76] x86/boot/compressed/64: Disable red-zone usage Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 13/76] x86/boot/compressed/64: Add IDT Infrastructure Joerg Roedel
2020-08-27 15:26 ` Arvind Sankar
2020-08-28 12:12 ` Joerg Roedel
2020-08-28 15:09 ` Arvind Sankar
2020-08-24 8:54 ` [PATCH v6 14/76] x86/boot/compressed/64: Rename kaslr_64.c to ident_map_64.c Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 15/76] x86/boot/compressed/64: Add page-fault handler Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 16/76] x86/boot/compressed/64: Always switch to own page-table Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 17/76] x86/boot/compressed/64: Don't pre-map memory in KASLR code Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 18/76] x86/boot/compressed/64: Change add_identity_map() to take start and end Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 19/76] x86/boot/compressed/64: Add stage1 #VC handler Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 20/76] x86/boot/compressed/64: Call set_sev_encryption_mask earlier Joerg Roedel
2020-08-27 9:36 ` Borislav Petkov
2020-08-24 8:54 ` [PATCH v6 21/76] x86/boot/compressed/64: Check return value of kernel_ident_mapping_init() Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 22/76] x86/boot/compressed/64: Add set_page_en/decrypted() helpers Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 23/76] x86/boot/compressed/64: Setup GHCB Based VC Exception handler Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 24/76] x86/boot/compressed/64: Unmap GHCB page before booting the kernel Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 25/76] x86/sev-es: Add support for handling IOIO exceptions Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 26/76] x86/fpu: Move xgetbv()/xsetbv() into separate header Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 27/76] x86/sev-es: Add CPUID handling to #VC handler Joerg Roedel
2020-08-27 22:48 ` Arvind Sankar
2020-08-28 12:33 ` Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 28/76] x86/idt: Move IDT to data segment Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 29/76] x86/idt: Split idt_data setup out of set_intr_gate() Joerg Roedel
2020-08-28 15:16 ` Borislav Petkov
2020-08-24 8:54 ` [PATCH v6 30/76] x86/head/64: Install startup GDT Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 31/76] x86/head/64: Setup MSR_GS_BASE before calling into C code Joerg Roedel
2020-08-28 18:13 ` Borislav Petkov
2020-09-01 12:09 ` Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 32/76] x86/head/64: Load GDT after switch to virtual addresses Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 33/76] x86/head/64: Load segment registers earlier Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 34/76] x86/head/64: Switch to initial stack earlier Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 35/76] x86/head/64: Make fixup_pointer() static inline Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 36/76] x86/head/64: Load IDT earlier Joerg Roedel
2020-08-29 10:24 ` Borislav Petkov
2020-09-01 12:13 ` Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 37/76] x86/head/64: Move early exception dispatch to C code Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 38/76] x86/head/64: Set CR4.FSGSBASE early Joerg Roedel
2020-08-29 15:55 ` Borislav Petkov
2020-08-31 8:58 ` Joerg Roedel
2020-08-31 9:26 ` Borislav Petkov
2020-08-24 8:54 ` [PATCH v6 39/76] x86/sev-es: Add SEV-ES Feature Detection Joerg Roedel
2020-08-29 16:25 ` Borislav Petkov
2020-08-24 8:54 ` [PATCH v6 40/76] x86/sev-es: Print SEV-ES info into kernel log Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 41/76] x86/sev-es: Compile early handler code into kernel image Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 42/76] x86/sev-es: Setup early #VC handler Joerg Roedel
2020-08-31 9:45 ` Borislav Petkov
2020-09-01 12:59 ` Joerg Roedel
2020-09-01 13:35 ` Borislav Petkov
2021-09-04 9:39 ` Lai Jiangshan
2021-09-06 5:07 ` Juergen Gross
2020-08-24 8:54 ` [PATCH v6 43/76] x86/sev-es: Setup GHCB based boot " Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 44/76] x86/sev-es: Setup per-cpu GHCBs for the runtime handler Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 45/76] x86/sev-es: Allocate and Map IST stack for #VC handler Joerg Roedel
2020-08-31 10:27 ` Borislav Petkov
2020-08-24 8:54 ` Joerg Roedel [this message]
2020-08-31 11:05 ` [PATCH v6 46/76] x86/sev-es: Adjust #VC IST Stack on entering NMI handler Borislav Petkov
2020-08-24 8:54 ` [PATCH v6 47/76] x86/dumpstack/64: Add noinstr version of get_stack_info() Joerg Roedel
2020-08-31 11:11 ` Borislav Petkov
2020-08-24 8:54 ` [PATCH v6 48/76] x86/entry/64: Add entry code for #VC handler Joerg Roedel
2020-08-31 11:30 ` Borislav Petkov
2020-09-01 13:29 ` Joerg Roedel
2020-08-31 17:30 ` Borislav Petkov
2020-08-24 8:54 ` [PATCH v6 49/76] x86/sev-es: Add Runtime #VC Exception Handler Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 50/76] x86/sev-es: Wire up existing #VC exit-code handlers Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 51/76] x86/sev-es: Handle instruction fetches from user-space Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 52/76] x86/sev-es: Handle MMIO events Joerg Roedel
2020-08-31 15:47 ` Borislav Petkov
2020-08-24 8:54 ` [PATCH v6 53/76] x86/sev-es: Handle MMIO String Instructions Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 54/76] x86/sev-es: Handle MSR events Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 55/76] x86/sev-es: Handle DR7 read/write events Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 56/76] x86/sev-es: Handle WBINVD Events Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 57/76] x86/sev-es: Handle RDTSC(P) Events Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 58/76] x86/sev-es: Handle RDPMC Events Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 59/76] x86/sev-es: Handle INVD Events Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 60/76] x86/sev-es: Handle MONITOR/MONITORX Events Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 61/76] x86/sev-es: Handle MWAIT/MWAITX Events Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 62/76] x86/sev-es: Handle VMMCALL Events Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 63/76] x86/sev-es: Handle #AC Events Joerg Roedel
2020-08-24 8:54 ` [PATCH v6 64/76] x86/sev-es: Handle #DB Events Joerg Roedel
2020-08-31 16:19 ` Borislav Petkov
2020-08-24 8:55 ` [PATCH v6 65/76] x86/paravirt: Allow hypervisor specific VMMCALL handling under SEV-ES Joerg Roedel
2020-08-24 8:55 ` [PATCH v6 66/76] x86/kvm: Add KVM " Joerg Roedel
2020-08-24 8:55 ` [PATCH v6 67/76] x86/vmware: Add VMware specific handling for VMMCALL " Joerg Roedel
2020-08-24 8:55 ` [PATCH v6 68/76] x86/realmode: Add SEV-ES specific trampoline entry point Joerg Roedel
2020-08-24 8:55 ` [PATCH v6 69/76] x86/realmode: Setup AP jump table Joerg Roedel
2020-08-31 17:09 ` Borislav Petkov
2020-09-01 13:55 ` Joerg Roedel
2020-08-24 8:55 ` [PATCH v6 70/76] x86/smpboot: Setup TSS for starting AP Joerg Roedel
2020-08-31 17:25 ` Borislav Petkov
2020-08-24 8:55 ` [PATCH v6 71/76] x86/head/64: Don't call verify_cpu() on starting APs Joerg Roedel
2020-08-24 8:55 ` [PATCH v6 72/76] x86/head/64: Rename start_cpu0 Joerg Roedel
2020-08-31 17:29 ` Borislav Petkov
2020-08-24 8:55 ` [PATCH v6 73/76] x86/sev-es: Support CPU offline/online Joerg Roedel
2020-08-24 8:55 ` [PATCH v6 74/76] x86/sev-es: Handle NMI State Joerg Roedel
2020-08-24 8:55 ` [PATCH v6 75/76] x86/efi: Add GHCB mappings when SEV-ES is active Joerg Roedel
2020-08-24 8:55 ` [PATCH v6 76/76] x86/sev-es: Check required CPU features for SEV-ES Joerg Roedel
2020-08-25 0:21 ` [PATCH v6 00/76] x86: SEV-ES Guest Support Mike Stunes
2020-08-25 6:24 ` Joerg Roedel
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