From: Krzysztof Kozlowski <krzk@kernel.org>
To: Lee Jones <lee.jones@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Miquel Raynal <miquel.raynal@bootlin.com>,
Richard Weinberger <richard@nod.at>,
Vignesh Raghavendra <vigneshr@ti.com>,
Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Fabio Estevam <festevam@gmail.com>,
NXP Linux Team <linux-imx@nxp.com>,
Adam Ford <aford173@gmail.com>,
Daniel Baluta <daniel.baluta@nxp.com>,
Anson Huang <Anson.Huang@nxp.com>,
Robin Gong <yibin.gong@nxp.com>, Li Jun <jun.li@nxp.com>,
Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>,
Han Xu <han.xu@nxp.com>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-mtd@lists.infradead.org,
linux-arm-kernel@lists.infradead.org
Cc: Krzysztof Kozlowski <krzk@kernel.org>
Subject: [PATCH 07/16] arm64: dts: imx8mm-evk: Align pin configuration group names with schema
Date: Mon, 24 Aug 2020 21:06:52 +0200 [thread overview]
Message-ID: <20200824190701.8447-7-krzk@kernel.org> (raw)
In-Reply-To: <20200824190701.8447-1-krzk@kernel.org>
Device tree schema expects pin configuration groups to end with 'grp'
suffix, otherwise dtbs_check complain with a warning like:
... do not match any of the regexes: 'grp$', 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
arch/arm64/boot/dts/freescale/imx8mm-evk.dts | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk.dts b/arch/arm64/boot/dts/freescale/imx8mm-evk.dts
index 0115f07bbc9d..207dc8de3145 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-evk.dts
@@ -423,13 +423,13 @@
>;
};
- pinctrl_pmic: pmicirq {
+ pinctrl_pmic: pmicirqgrp {
fsl,pins = <
MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x41
>;
};
- pinctrl_reg_usdhc2_vmmc: regusdhc2vmmc {
+ pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
fsl,pins = <
MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41
>;
@@ -457,7 +457,7 @@
>;
};
- pinctrl_usdhc2_gpio: usdhc2grpgpio {
+ pinctrl_usdhc2_gpio: usdhc2gpiogrp {
fsl,pins = <
MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x1c4
>;
@@ -475,7 +475,7 @@
>;
};
- pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
+ pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
fsl,pins = <
MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194
MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4
@@ -487,7 +487,7 @@
>;
};
- pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
+ pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
fsl,pins = <
MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196
MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6
@@ -515,7 +515,7 @@
>;
};
- pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
+ pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
fsl,pins = <
MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x194
MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4
@@ -531,7 +531,7 @@
>;
};
- pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
+ pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
fsl,pins = <
MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x196
MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6
--
2.17.1
next prev parent reply other threads:[~2020-08-24 19:07 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-24 19:06 [PATCH 01/16] dt-bindings: mfd: rohm,bd71847-pmic: Correct clock properties requirements Krzysztof Kozlowski
2020-08-24 19:06 ` [PATCH 02/16] dt-bindings: mtd: gpmi-nand: Fix matching of clocks on different SoCs Krzysztof Kozlowski
2020-08-25 6:40 ` Sascha Hauer
2020-08-25 6:49 ` Krzysztof Kozlowski
2020-08-24 19:06 ` [PATCH 03/16] arm64: dts: imx8mm-beacon-som.dtsi: Align regulator names with schema Krzysztof Kozlowski
2020-08-25 6:51 ` Vaittinen, Matti
2020-08-25 7:25 ` krzk
2020-08-25 7:45 ` krzk
2020-08-25 7:50 ` krzk
2020-08-25 8:22 ` Vaittinen, Matti
2020-08-25 8:27 ` krzk
2020-08-25 9:35 ` Vaittinen, Matti
2020-08-25 8:29 ` Krzysztof Kozlowski
2020-08-24 19:06 ` [PATCH 04/16] arm64: dts: imx8mm-beacon-baseboard: Correct SPI CS polarity Krzysztof Kozlowski
2020-08-24 20:07 ` Fabio Estevam
2020-08-24 19:06 ` [PATCH 05/16] arm64: dts: imx8mm-beacon: Align pin configuration group names with schema Krzysztof Kozlowski
2020-08-24 19:06 ` [PATCH 06/16] arm64: dts: imx8mm-evk: Add 32.768 kHz clock to PMIC Krzysztof Kozlowski
2020-08-24 19:06 ` Krzysztof Kozlowski [this message]
2020-08-24 19:06 ` [PATCH 08/16] arm64: dts: imx8mm-ddr4-evk: Align pin configuration group names with schema Krzysztof Kozlowski
2020-08-24 19:06 ` [PATCH 09/16] arm64: dts: imx8mn-evk: " Krzysztof Kozlowski
2020-08-24 19:06 ` [PATCH 10/16] arm64: dts: imx8mq-evk: " Krzysztof Kozlowski
2020-08-24 19:06 ` [PATCH 11/16] arm64: dts: imx8mq-librem5-devkit: " Krzysztof Kozlowski
2020-08-24 19:06 ` [PATCH 12/16] arm64: dts: imx8mq-phanbell: " Krzysztof Kozlowski
2020-08-24 19:06 ` [PATCH 13/16] arm64: dts: imx8mq-pico-pi: " Krzysztof Kozlowski
2020-08-24 19:06 ` [PATCH 14/16] arm64: dts: imx8mq-sr-som: " Krzysztof Kozlowski
2020-08-24 19:07 ` [PATCH 15/16] arm64: dts: imx8mq-hummingboard-pulse: " Krzysztof Kozlowski
2020-08-24 19:07 ` [PATCH 16/16] arm64: dts: imx8qxp-colibri: " Krzysztof Kozlowski
2020-08-25 6:23 ` [PATCH 01/16] dt-bindings: mfd: rohm,bd71847-pmic: Correct clock properties requirements Vaittinen, Matti
2020-08-25 6:55 ` krzk
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